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test: pin net-label placement defects per bug report#720

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DPS0340:test/pin-label-placement
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test: pin net-label placement defects per bug report#720
DPS0340 wants to merge 1 commit into
tscircuit:mainfrom
DPS0340:test/pin-label-placement

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@DPS0340 DPS0340 commented Jul 25, 2026

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Same pattern as #718, applied to net-label placement instead of trace crossings.

What it measures

Two defects, per imported bug report:

Corpus state on main: 8 labels inside chips, 7 overlapping pairs.

The threshold matters, and I got it wrong first

My initial version counted any interior overlap. That reported 17 in-chip labels — but when I looked at what it was flagging, most were incidental grazes:

TH_20    coverage=3%
TH_80    coverage=3%
SDA      coverage=6%
SCL      coverage=6%
HIDRV    coverage=1%

NetLabelNetLabelCollisionSolver has CHIP_COLLISION_MIN_OVERLAP_FRACTION = 0.5 and tolerates smaller overlaps deliberately — its comment says relocating them can violate orientation preferences. So a metric counting every graze would report defects the solver is intentionally leaving alone, and would fight the implementation rather than guard it.

The helper now mirrors that constant. With it, the count is 8 rather than 17, and every remaining one is a genuine ≥50% cover.

Why pin it

These boards are verified by SVG snapshots today. A label sliding under a chip is a few pixels in a large regenerated SVG and easy to approve by accident. Pinning means a placement regression fails an assertion that names the board.

The numbers are current state, not targets. Several are open bugs and should come down — #699 already takes bug-report-20260707T230831Z from 4 to 0.

There's also a guard asserting the pinned set matches what's on disk, so a newly imported bug report can't go unmeasured.

Verification

  • The guard bites: changing the expected insideChips for bug-report-20260707T230831Z from 4 to 3 fails with a visible diff. A pinning test that can't fail is worse than none.
  • Full suite 168 pass / 0 fail / 4 skip, tsc --noEmit clean, biome clean.
  • Reads netLabelNetLabelCollisionSolver.getOutput().netLabelPlacements — the output copy. The solver also exposes netLabelPlacements, which is its input; reading that makes any fix look like a no-op.

Diff: 2 new files, no existing file touched. Independent of #718 — either can merge first.

Adds helpers that count net labels rendered inside chip bodies (tscircuit#655) and
labels overlapping each other, plus a test pinning the current count for
every imported bug report.

The inside-chip check mirrors CHIP_COLLISION_MIN_OVERLAP_FRACTION from
NetLabelNetLabelCollisionSolver: a label counts as inside a chip only once
the chip covers at least half of it. Counting any interior overlap instead
reports incidental 1-6% grazes that the solver tolerates deliberately, so
the metric would fight the implementation rather than guard it.

Corpus state on main: 8 labels inside chips, 7 label-label overlaps.
These are current values, not targets — several are open bugs.

Verified the guard bites: changing the expected insideChips for
bug-report-20260707T230831Z from 4 to 3 fails with a visible diff.
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