Enable suspend/resume on Pi 5

arch/arm/boot/dts/overlays/README

@@ -3992,6 +3992,8 @@ Params: l1ss                    Enable RC ASPM L1 sub-state support. Requires
                                 requires DMA and MSI addresses to be 32bit.
         mmio-hi                 Move the start of outbound 32bit addresses to
                                 2GB and expand 64bit outbound space to 14GB.
+        no-pwr-ctrl             Disable power control for 3v3. It is left
+                                permanently powered on.
 
 
 [ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]

arch/arm/boot/dts/overlays/pciex1-compat-pi5-overlay.dts

@@ -51,10 +51,22 @@
 		};
 	};
 
+	/*
+	 * Disable the regulator control for 3v3.
+	 * This stops the device from losing power
+	 */
+	fragment@4 {
+		target = <&pcie1_3v3>;
+		__dormant__ {
+			regulator-always-on;
+		};
+	};
+
 	__overrides__ {
 		l1ss = <0>, "+0";
 		no-l0s = <0>, "+1";
 		no-mip = <0>, "+2";
 		mmio-hi = <0>, "+3";
+		no-pwr-ctrl = <0>, "+4";
 	};
 };

arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts

@@ -101,6 +101,17 @@
 		gpio = <&rp1_gpio 46 0>;  // CD1_IO0_MICCLK, to MIPI 1 connector
 	};
 
+	pcie1_3v3: pcie1_3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "pcie1-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&rp1_gpio 28 GPIO_ACTIVE_HIGH>;  // PCIE_RP1_WAKE
+		startup-delay-us = <20000>;
+	};
+
 	cam_dummy_reg: cam_dummy_reg {
 		compatible = "regulator-fixed";
 		regulator-name = "cam-dummy-reg";
@@ -125,6 +136,19 @@ rp1_target: &pcie2 {
 
 &pcie1 {
 	brcm,fifo-qos-map = /bits/ 8 <3 3 3 3>;
+
+	// Make this a consumer of rp1
+	vpcie3v3-supply = <&pcie1_3v3>;
+
+	pci@0,0 {
+		device_type = "pci";
+		reg = <0 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges;
+
+		vpcie3v3-supply = <&pcie1_3v3>;
+	};
 };
 
 // The system SPI for the bootloader EEPROM
@@ -426,6 +450,7 @@ dpi_16bit_gpio2:        &rp1_dpi_16bit_gpio2        { };
 	vmmc-supply = <&wl_on_reg>;
 	sd-uhs-ddr50;
 	non-removable;
+	cap-power-off-card;
 	status = "okay";
 	#address-cells = <1>;
 	#size-cells = <0>;

arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi

@@ -88,6 +88,17 @@
 		gpio = <&rp1_gpio 34 0>;  // CD0_IO0_MICCLK, to CAM_GPIO on connector
 	};
 
+	pcie1_3v3: pcie1_3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "pcie1-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&rp1_gpio 28 GPIO_ACTIVE_HIGH>;  // PCIE_PWR_EN
+		startup-delay-us = <20000>;
+	};
+
 	cam_dummy_reg: cam_dummy_reg {
 		compatible = "regulator-fixed";
 		regulator-name = "cam-dummy-reg";
@@ -112,6 +123,19 @@ rp1_target: &pcie2 {
 
 &pcie1 {
 	brcm,fifo-qos-map = /bits/ 8 <3 3 3 3>;
+
+	// Make this a consumer of rp1
+	vpcie3v3-supply = <&pcie1_3v3>;
+
+	pci@0,0 {
+		device_type = "pci";
+		reg = <0 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges;
+
+		vpcie3v3-supply = <&pcie1_3v3>;
+	};
 };
 
 // The system SPI for the bootloader EEPROM
@@ -411,6 +435,7 @@ dpi_16bit_gpio2:        &rp1_dpi_16bit_gpio2        { };
 	vmmc-supply = <&wl_on_reg>;
 	sd-uhs-ddr50;
 	non-removable;
+	cap-power-off-card;
 	status = "okay";
 	#address-cells = <1>;
 	#size-cells = <0>;

arch/arm64/configs/bcm2712_defconfig

@@ -50,7 +50,6 @@ CONFIG_ARM64_ERRATUM_2441009=y
 CONFIG_ARM64_16K_PAGES=y
 CONFIG_ARM64_VA_BITS_47=y
 CONFIG_NR_CPUS=4
-CONFIG_HOTPLUG_CPU=y
 CONFIG_NUMA=y
 CONFIG_COMPAT=y
 CONFIG_ARMV8_DEPRECATED=y
@@ -59,9 +58,11 @@ CONFIG_CP15_BARRIER_EMULATION=y
 CONFIG_SETEND_EMULATION=y
 CONFIG_RANDOMIZE_BASE=y
 CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait"
-# CONFIG_SUSPEND is not set
-CONFIG_PM=y
+CONFIG_HIBERNATION=y
 CONFIG_PM_DEBUG=y
+CONFIG_DPM_WATCHDOG=y
+CONFIG_DPM_WATCHDOG_TIMEOUT=30
+CONFIG_DPM_WATCHDOG_WARNING_TIMEOUT=5
 CONFIG_CPU_IDLE=y
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_STAT=y

drivers/gpio/gpio-brcmstb.c

@@ -10,6 +10,7 @@
 #include <linux/irqchip/chained_irq.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
+#include <linux/pm.h>
 #include <linux/string_choices.h>
 
 enum gio_reg_index {
@@ -576,8 +577,15 @@ static int brcmstb_gpio_resume(struct device *dev)
 #endif /* CONFIG_PM_SLEEP */
 
 static const struct dev_pm_ops brcmstb_gpio_pm_ops = {
-	.suspend_noirq	= brcmstb_gpio_suspend,
-	.resume_noirq = brcmstb_gpio_resume,
+	/*
+	 * A hibernate power cycle wipes this GPIO bank's registers, same
+	 * as a suspend-to-RAM transition. Only wiring .suspend_noirq/
+	 * .resume_noirq left the save/restore logic below unreachable on
+	 * the freeze/thaw and poweroff/restore phases hibernate actually
+	 * uses, so an output pin's level (and anything else save/restore
+	 * covers) was silently lost across hibernate specifically.
+	 */
+	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(brcmstb_gpio_suspend, brcmstb_gpio_resume)
 };
 
 static int brcmstb_gpio_probe(struct platform_device *pdev)

drivers/gpu/drm/vc4/vc4_drv.c

@@ -494,6 +494,22 @@ static void vc4_platform_drm_shutdown(struct platform_device *pdev)
 	drm_atomic_helper_shutdown(platform_get_drvdata(pdev));
 }
 
+static int vc4_drm_suspend(struct device *dev)
+{
+	struct drm_device *drm = dev_get_drvdata(dev);
+
+	return drm_mode_config_helper_suspend(drm);
+}
+
+static int vc4_drm_resume(struct device *dev)
+{
+	struct drm_device *drm = dev_get_drvdata(dev);
+
+	return drm_mode_config_helper_resume(drm);
+}
+
+static DEFINE_SIMPLE_DEV_PM_OPS(vc4_drm_pm_ops, vc4_drm_suspend, vc4_drm_resume);
+
 static const struct of_device_id vc4_of_match[] = {
 	{ .compatible = "brcm,bcm2711-vc5", .data = (void *)VC4_GEN_5 },
 	/* NB GEN_6_C will be corrected on D0 hw to GEN_6_D via vc4_hvs_bind */
@@ -511,6 +527,7 @@ static struct platform_driver vc4_platform_driver = {
 	.driver		= {
 		.name	= "vc4-drm",
 		.of_match_table = vc4_of_match,
+		.pm	= pm_sleep_ptr(&vc4_drm_pm_ops),
 	},
 };
 

drivers/gpu/drm/vc4/vc4_hdmi.c

@@ -3091,19 +3091,13 @@ static int vc4_hdmi_runtime_resume(struct device *dev)
 		return ret;
 
 	/*
-	 * Whenever the RaspberryPi boots without an HDMI monitor
-	 * plugged in, the firmware won't have initialized the HSM clock
-	 * rate and it will be reported as 0.
-	 *
-	 * If we try to access a register of the controller in such a
-	 * case, it will lead to a silent CPU stall. Let's make sure we
-	 * prevent such a case.
+	 * The clock rate may be reported wrong after suspend to RAM.
+	 * This may cause a cpu stall.
 	 */
 	rate = clk_get_rate(vc4_hdmi->hsm_clock);
-	if (!rate) {
-		ret = -EINVAL;
-		goto err_disable_clk;
-	}
+	if (!rate)
+		dev_warn(&vc4_hdmi->pdev->dev,
+			 "hsm_clock rate is 0, proceeding anyway\n");
 
 	ret = clk_prepare_enable(vc4_hdmi->audio_clock);
 	if (ret)
@@ -3441,6 +3435,8 @@ static const struct dev_pm_ops vc4_hdmi_pm_ops = {
 	SET_RUNTIME_PM_OPS(vc4_hdmi_runtime_suspend,
 			   vc4_hdmi_runtime_resume,
 			   NULL)
+	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+				pm_runtime_force_resume)
 };
 
 struct platform_driver vc4_hdmi_driver = {

drivers/gpu/drm/vc4/vc4_hvs.c

@@ -23,6 +23,7 @@
 #include <linux/clk.h>
 #include <linux/component.h>
 #include <linux/platform_device.h>
+#include <linux/pm.h>
 
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_drv.h>
@@ -437,12 +438,28 @@ static const u32 nearest_neighbour_kernel[] =
 	VC4_LINEAR_PHASE_KERNEL(0, 0, 0, 0, 0, 0, 0, 0,
 				1, 1, 1, 1, 255, 255, 255, 255);
 
+static void vc4_hvs_write_linear_kernel(struct vc4_hvs *hvs,
+					struct drm_mm_node *space,
+					const u32 *kernel)
+{
+	u32 __iomem *dst_kernel = hvs->dlist + space->start;
+	unsigned int i;
+
+	for (i = 0; i < VC4_KERNEL_DWORDS; i++) {
+		if (i < VC4_LINEAR_PHASE_KERNEL_DWORDS)
+			writel(kernel[i], &dst_kernel[i]);
+		else {
+			writel(kernel[VC4_KERNEL_DWORDS - i - 1],
+			       &dst_kernel[i]);
+		}
+	}
+}
+
 static int vc4_hvs_upload_linear_kernel(struct vc4_hvs *hvs,
 					struct drm_mm_node *space,
 					const u32 *kernel)
 {
-	int ret, i;
-	u32 __iomem *dst_kernel;
+	int ret;
 
 	/*
 	 * NOTE: We don't need a call to drm_dev_enter()/drm_dev_exit()
@@ -456,16 +473,7 @@ static int vc4_hvs_upload_linear_kernel(struct vc4_hvs *hvs,
 		return ret;
 	}
 
-	dst_kernel = hvs->dlist + space->start;
-
-	for (i = 0; i < VC4_KERNEL_DWORDS; i++) {
-		if (i < VC4_LINEAR_PHASE_KERNEL_DWORDS)
-			writel(kernel[i], &dst_kernel[i]);
-		else {
-			writel(kernel[VC4_KERNEL_DWORDS - i - 1],
-			       &dst_kernel[i]);
-		}
-	}
+	vc4_hvs_write_linear_kernel(hvs, space, kernel);
 
 	return 0;
 }
@@ -2109,6 +2117,8 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
 	if (IS_ERR(hvs))
 		return PTR_ERR(hvs);
 
+	platform_set_drvdata(pdev, hvs);
+
 	hvs->regset.base = hvs->regs;
 
 	if (vc4->gen == VC4_GEN_6_C) {
@@ -2291,6 +2301,35 @@ static void vc4_hvs_dev_remove(struct platform_device *pdev)
 	component_del(&pdev->dev, &vc4_hvs_ops);
 }
 
+static int vc4_hvs_resume_early(struct device *dev)
+{
+	struct vc4_hvs *hvs = platform_get_drvdata(to_platform_device(dev));
+	struct vc4_dev *vc4;
+	int ret;
+
+	if (!hvs)
+		return 0;
+
+	vc4 = hvs->vc4;
+	if (vc4->gen >= VC4_GEN_6_C)
+		ret = vc6_hvs_hw_init(hvs);
+	else
+		ret = vc4_hvs_hw_init(hvs);
+	if (ret)
+		return ret;
+
+	vc4_hvs_write_linear_kernel(hvs, &hvs->mitchell_netravali_filter,
+				    mitchell_netravali_1_3_1_3_kernel);
+	vc4_hvs_write_linear_kernel(hvs, &hvs->nearest_neighbour_filter,
+				    nearest_neighbour_kernel);
+
+	return vc4_hvs_cob_init(hvs);
+}
+
+static const struct dev_pm_ops vc4_hvs_pm_ops = {
+	SET_LATE_SYSTEM_SLEEP_PM_OPS(NULL, vc4_hvs_resume_early)
+};
+
 static const struct of_device_id vc4_hvs_dt_match[] = {
 	{ .compatible = "brcm,bcm2711-hvs" },
 	{ .compatible = "brcm,bcm2712-hvs" },
@@ -2304,5 +2343,6 @@ struct platform_driver vc4_hvs_driver = {
 	.driver = {
 		.name = "vc4_hvs",
 		.of_match_table = vc4_hvs_dt_match,
+		.pm = pm_sleep_ptr(&vc4_hvs_pm_ops),
 	},
 };