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53d6c16
Update pulp cluster: updated iDMA wrap with 3D transfers support, 2 p…
RiccardoGandolfi Nov 28, 2025
4fd60b5
tb: Fix timeunit to ns and change clock value to 500MHz
LuigiGhionda Dec 4, 2025
f15fe20
Updates on iDMA and cluster for Burst Splitting parametrization (#9)
RiccardoGandolfi Jan 8, 2026
f5ce687
Fix CHANGELOG (#14)
yvantor Jan 10, 2026
bfc6185
rtl: Improve HMR parametrization to avoid width mismatch
LuigiGhionda Feb 5, 2026
67c1698
tb: Fix mock UART AXI address map
LuigiGhionda Feb 5, 2026
3d14e28
[IDMA CLOCK GATING] Added clock gating features in iDMA + updated pul…
RiccardoGandolfi Feb 25, 2026
d3b59ff
[CLUSTER_PERIPHERALS] Updated cluster peripherals commit
RiccardoGandolfi Feb 26, 2026
d89377b
Update regression_tests and pulp_runtime commmits in Makefile
RiccardoGandolfi May 4, 2026
ff7fcee
Align CI
LuigiGhionda May 19, 2026
0ebd913
[MAKEFILE] Update regression tests commit: align fault injection time…
RiccardoGandolfi May 19, 2026
3ae586c
Restore techfiles path
LuigiGhionda May 19, 2026
cbfc481
[RUNTIME & REGRESSION TESTS] Update pulp-runtime & regression tests c…
RiccardoGandolfi May 22, 2026
48b50ce
[iDMA & RUNTIME] Update iDMA commit: restore old maxnumstreams parame…
RiccardoGandolfi May 25, 2026
45c9940
[RUNTIME & REGRESSION] Update commits for pulp-runtime and regression…
RiccardoGandolfi May 26, 2026
3259492
[BENDER] Update Bender.yml and Bender.lock with new cluster_periphera…
RiccardoGandolfi May 27, 2026
e76cd0f
[Makefile] Fix bender
Jun 8, 2026
14b9c87
[env] Suppress bender errors
Jun 8, 2026
a488826
[Bender & iDMA] Update iDMA commit + update burst length parameter in…
RiccardoGandolfi Jun 8, 2026
805ce22
[BENDER & MAKEFILE] Update cluster_peripherals, regression_tests and …
RiccardoGandolfi Jun 9, 2026
839ee60
[iDMA] Update commit for iDMA: rebase on latest master
RiccardoGandolfi Jun 9, 2026
1085397
[iDMA] Update iDMA commit
RiccardoGandolfi Jun 16, 2026
8b89b3a
[iDMA] Update rule to generate idma rtl + update idma commit
RiccardoGandolfi Jun 16, 2026
29b355c
Update runtime commit: new iDMA register map
RiccardoGandolfi Jun 18, 2026
feb7f8d
Update iDMA commit + update Makefile rule to generate iDMA rtl + upda…
RiccardoGandolfi Jun 18, 2026
1ec081f
Try fix for uv installation
RiccardoGandolfi Jun 18, 2026
a6daa65
[MAKEFILE] Update pulp-runtime commit: up-to-date iDMA register map i…
RiccardoGandolfi Jun 18, 2026
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14 changes: 7 additions & 7 deletions Bender.lock
Original file line number Diff line number Diff line change
Expand Up @@ -62,8 +62,8 @@ packages:
dependencies:
- common_cells
cluster_peripherals:
revision: e464eb9ddcc39e5a50009819601c4f213b1d4ba3
version: 2.2.0
revision: 072ddd876c88324ef28856d4b2697424aaa231ce
version: null
source:
Git: https://github.com/pulp-platform/cluster_peripherals.git
dependencies:
Expand Down Expand Up @@ -179,8 +179,8 @@ packages:
Git: https://github.com/pulp-platform/icache-intc.git
dependencies: []
idma:
revision: c12caf59bb482fe44b27361f6924ad346b2d22fe
version: 0.6.3
revision: 6be43a77c81e86c53e821dfbc618522c375ff28c
version: null
source:
Git: https://github.com/pulp-platform/iDMA.git
dependencies:
Expand All @@ -204,7 +204,7 @@ packages:
dependencies:
- common_cells
neureka:
revision: f4e131c86205d37882cf02ea4dd3bd141ef32d86
revision: 2e076f7d25cdfba38821ee95595bb27aec53c764
version: null
source:
Git: https://github.com/pulp-platform/neureka.git
Expand All @@ -230,8 +230,8 @@ packages:
dependencies:
- axi_slice
redmule:
revision: 78696fb0d6d429bdad2e38740792648d44095605
version: 2.0.4
revision: dbcba6b1efda24dc909ebdd4ace132f798c8c12b
version: null
source:
Git: https://github.com/pulp-platform/redmule.git
dependencies:
Expand Down
23 changes: 12 additions & 11 deletions Bender.yml
Original file line number Diff line number Diff line change
Expand Up @@ -17,16 +17,17 @@ dependencies:
per2axi: { git: "https://github.com/pulp-platform/per2axi.git", rev: v1.0.5 }
cluster_interconnect: { git: "https://github.com/pulp-platform/cluster_interconnect.git", rev: v1.3.0 }
event_unit_flex: { git: "https://github.com/pulp-platform/event_unit_flex.git", rev: astral-v1.0 }
mchan: { git: "https://github.com/pulp-platform/mchan.git", rev: v1.2.4 }
idma: { git: "https://github.com/pulp-platform/iDMA.git", rev: v0.6.3 }
hier-icache: { git: "https://github.com/pulp-platform/hier-icache.git", rev: v1.3.0 }
cluster_icache: { git: "https://github.com/pulp-platform/cluster_icache.git", rev: v0.2.0 }
cluster_peripherals: { git: "https://github.com/pulp-platform/cluster_peripherals.git", rev: v2.2.0 }
axi: { git: "https://github.com/pulp-platform/axi.git", version: 0.39.3 }
timer_unit: { git: "https://github.com/pulp-platform/timer_unit.git", version: 1.0.2 }
common_cells: { git: "https://github.com/pulp-platform/common_cells.git", version: 1.35.0 }
tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.3 }
flex-v: { git: "https://github.com/pulp-platform/flex-v.git", rev: astral-v1.1 }
mchan: { git: "https://github.com/pulp-platform/mchan.git", version: =1.2.4 }
idma: { git: "https://github.com/pulp-platform/iDMA.git", rev: 6be43a77c81e86c53e821dfbc618522c375ff28c } #devel
obi: { git: "https://github.com/pulp-platform/obi.git", version: =0.1.7 }
hier-icache: { git: "https://github.com/pulp-platform/hier-icache.git", version: =1.3.0 }
cluster_icache: { git: "https://github.com/pulp-platform/cluster_icache.git", version: =0.2.0 }
cluster_peripherals: { git: "https://github.com/pulp-platform/cluster_peripherals.git", rev: "072ddd876c88324ef28856d4b2697424aaa231ce" }
axi: { git: "https://github.com/pulp-platform/axi.git", version: =0.39.8 }
timer_unit: { git: "https://github.com/pulp-platform/timer_unit.git", version: =1.0.2 }
common_cells: { git: "https://github.com/pulp-platform/common_cells.git", version: =1.38.0 }
tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: =0.2.3 }
flex-v: { git: "https://github.com/pulp-platform/flex-v.git", rev: e9355c2f6ec4c105abdff39489e5d1be93bc4374 }
cv32e40p: { git: "https://github.com/pulp-platform/cv32e40p.git", rev: astral-v1.0 }
ibex: { git: "https://github.com/pulp-platform/ibex.git", rev: "pulpissimo-v6.1.2" }
scm: { git: "https://github.com/pulp-platform/scm.git", rev: v1.2.0 }
Expand Down Expand Up @@ -56,7 +57,7 @@ sources:
- target: mchan
files:
- rtl/mchan_wrap.sv
- target: not(mchan)
- target: idma
files:
- rtl/idma_wrap.sv
- rtl/hwpe_subsystem.sv
Expand Down
7 changes: 7 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,13 @@ All notable changes to this project will be documented in this file.
The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).

## v0.0.0
### Added
* iDMA: integrated iDMA wrap supporting up to 3D transfers with 2 physical channels and parametric burst length

### Fixed
* Testbench: fixed timeunit to ns and change clock to 500 MHz

## [Unreleased]
### Added
- Added `CHANGELOG.md`
Expand Down
73 changes: 62 additions & 11 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -14,17 +14,28 @@ endif

BENDER ?= bender

BENDER_SUPPRESS_WARNINGS ?= E24
export BENDER_SUPPRESS_WARNINGS

VSIM ?= $(QUESTA) vsim
VOPT ?= $(QUESTA) vopt
VLIB ?= $(QUESTA) vlib
top_level ?= pulp_cluster_tb

QSIM ?= $(QUESTA) qsim
QOPT ?= $(QUESTA) qopt
Q1VE ?= q1ve --qverify

VENV := venv

top_level ?= pulp_cluster
library ?= work
elf-bin ?= stimuli.riscv
bwruntest = $(ROOT_DIR)/pulp-runtime/scripts/bwruntests.py

REGRESSIONS := $(ROOT_DIR)/regression_tests

VLOG_ARGS += -suppress vlog-2583 -suppress vlog-13314 -suppress vlog-13233 -timescale \"1 ns / 1 ps\" \"+incdir+$(shell pwd)/include\"
VLOG_ARGS_LINT += -suppress vlog-2583 -suppress vlog-13314 -suppress vlog-13233 \"+incdir+$(shell pwd)/include\"
VLOG_ARGS += -suppress vlog-2583 -suppress vlog-13314 -suppress vlog-13233 -timescale \"1ns / 1ps\" \"+incdir+$(shell pwd)/include\"

define generate_vsim
echo 'set ROOT [file normalize [file dirname [info script]]/$3]' > $1
Expand All @@ -37,7 +48,7 @@ endef
######################

NONFREE_REMOTE ?= git@iis-git.ee.ethz.ch:pulp-restricted/pulp-cluster-nonfree.git
NONFREE_COMMIT ?= beb98ce
NONFREE_COMMIT ?= aad59d36bfef6b74f03ffed28903a44cb86b9497

nonfree-init:
git clone $(NONFREE_REMOTE) nonfree
Expand All @@ -49,14 +60,13 @@ nonfree-init:

.PHONY: init

init: checkout
init: checkout generate_idma_rtl scripts/compile.tcl

.PHONY: checkout
## Checkout/update dependencies using Bender
checkout:
$(BENDER) checkout
touch Bender.lock
make scripts/compile.tcl

Bender.lock:
$(BENDER) checkout
Expand All @@ -75,7 +85,7 @@ sw-clean:

## Clone pulp-runtime as SW stack
PULP_RUNTIME_REMOTE ?= https://github.com/pulp-platform/pulp-runtime.git
PULP_RUNTIME_COMMIT ?= f10670b # branch: lg/upstream
PULP_RUNTIME_COMMIT ?= 3b48b0c6872cc01ba169a2c9c886ebb815d22cdc

pulp-runtime:
git clone $(PULP_RUNTIME_REMOTE) $@
Expand All @@ -91,7 +101,7 @@ fault_injection_sim:

## Clone regression tests
REGRESSION_TESTS_REMOTE ?= https://github.com/pulp-platform/regression_tests.git
REGRESSION_TESTS_COMMIT ?= 7fa307d # branch: lg/upstream
REGRESSION_TESTS_COMMIT ?= f173611e3e8f15e7f526d40712135e7ff976f805 # branch: lg/upstream

regression_tests:
git clone $(REGRESSION_TESTS_REMOTE) $@
Expand All @@ -111,27 +121,68 @@ sim-clean:
include bender-common.mk
include bender-sim.mk
scripts/compile.tcl: | Bender.lock
$(call generate_vsim, $@, $(common_defs) $(common_targs) $(sim_defs) $(sim_targs),..)
$(call generate_vsim, $@, $(common_defs) $(common_targs) -t idma $(sim_defs) $(sim_targs),..)
echo 'vlog "$(realpath $(ROOT_DIR))/tb/dpi/elfloader.cpp" -ccflags "-std=c++11"' >> $@

scripts/compile.tcl-mchan: | Bender.lock
$(call generate_vsim, scripts/compile.tcl, $(common_defs) $(common_targs) -t mchan $(sim_defs) $(sim_targs),..)
echo 'vlog "$(realpath $(ROOT_DIR))/tb/dpi/elfloader.cpp" -ccflags "-std=c++11"' >> scripts/compile.tcl

include bender-synth.mk
scripts/synth-compile.tcl: | Bender.lock
$(BENDER) script synopsys $(common_targs) $(common_defs) $(synth_targs) $(synth_defs) > $@

scripts/compile_lint.tcl:
echo 'set ROOT $(ROOT_DIR)' > $@
$(BENDER) script vsim --vlog-arg="$(VLOG_ARGS_LINT)" $(common_defs) $(common_targs) | grep -v "set ROOT" >> $@
echo >> $@

$(library):
$(QUESTA) vlib $(library)


uv:
cd $(shell bender path idma) && \
curl -LsSf https://astral.sh/uv/install.sh | sh && \
uv sync --locked

generate_idma_rtl: uv
. "$(shell bender path idma)/.venv/bin/activate" && $(MAKE) -C $(shell bender path idma) idma_hw_all

compile: $(library)
@test -f Bender.lock || { echo "ERROR: Bender.lock file does not exist. Did you run make checkout in bender mode?"; exit 1; }
@test -f scripts/compile.tcl || { echo "ERROR: scripts/compile.tcl file does not exist. Did you run make scripts in bender mode?"; exit 1; }
$(VSIM) -c -do 'quit -code [source scripts/compile.tcl]'

build: compile
$(VOPT) $(compile_flag) -suppress 3053 -suppress 8885 -work $(library) $(top_level) -o $(top_level)_optimized +acc
build_qone: compile
$(QOPT) $(compile_flag) -debug +designfile -suppress 3053 -suppress 8885 -work $(library) $(top_level)_tb -o $(top_level)_tb_optimized


build: generate_idma_rtl compile
$(VOPT) $(compile_flag) -suppress 3053 -suppress 8885 -work $(library) $(top_level)_tb -o $(top_level)_tb_optimized +acc

compile_lint: $(library)
@test -f Bender.lock || { echo "ERROR: Bender.lock file does not exist. Did you run make checkout in bender mode?"; exit 1; }
@test -f scripts/compile_lint.tcl || { echo "ERROR: scripts/compile_lint.tcl file does not exist. Did you run make scripts in bender mode?"; exit 1; }
$(Q1VE) -od lint/comp_lint_results -c -do " \
onerror {exit}; \
do scripts/compile_lint.tcl; \
exit"

lint: compile_lint
$(Q1VE) -od lint/lint_results -c -do " \
lint methodology ip -goal release; \
lint run -d $(top_level); \
exit"

cdc: compile_lint
$(Q1VE) -od cdc_results -c -do " \
cdc run -d $(top_level); \
exit"

run:
$(VSIM) +permissive -suppress 3053 -suppress 8885 -lib $(library) +MAX_CYCLES=$(max_cycles) +UVM_TESTNAME=$(test_case) +APP=$(elf-bin) +notimingchecks +nospecify -t 1ps \
${top_level}_optimized +permissive-off ++$(elf-bin) ++$(target-options) ++$(cl-bin) | tee sim.log
${top_level}_tb_optimized +permissive-off ++$(elf-bin) ++$(target-options) ++$(cl-bin) | tee sim.log

####################
# Regression tests #
Expand Down
20 changes: 19 additions & 1 deletion README.md
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ We use [Bender](https://github.com/pulp-platform/bender) for hardware IP and dep
cargo install bender
```

## Simulation
## QuestaSim Simulation

It is possible to run benchmarks on the cluster, either within
[PULP](https://github.com/pulp-platform/pulp) or as a separate IP. For
Expand Down Expand Up @@ -68,3 +68,21 @@ Warning: requires QuestaSim 2022.3 or newer.
```

To use the GUI, add `gui=1` to the previous command.

## QuestaOne Simulation

To simulate with the new QuestaOne flow, follow the previous steps up to the `make pulp-runtime` command, then:

1. Run the following from the pulp cluster root directory:
```
make build_qone
```

2. Go to the desired test directory in regression_tests and run the following:
```
make clean all run_qone
```
or:
```
make clean all run_qone gui=1
```
1 change: 0 additions & 1 deletion bender-common.mk
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,6 @@ common_defs += -D CLUSTER_ALIAS
common_defs += -D USE_PULP_PARAMETERS

common_targs += -t rtl
common_targs += -t mchan
common_targs += -t cluster_standalone
common_targs += -t scm_use_fpga_scm
common_targs += -t cv32e40p_use_ff_regfile
2 changes: 2 additions & 0 deletions bender-synth.mk
Original file line number Diff line number Diff line change
Expand Up @@ -4,4 +4,6 @@

synth_defs :=

# Don't add the following for linting
synth_targs := -t pulp_standalone_synth
synth_targs += -t idma
19 changes: 8 additions & 11 deletions packages/pulp_cluster_package.sv
Original file line number Diff line number Diff line change
Expand Up @@ -208,7 +208,7 @@ package pulp_cluster_package;
NumCores: NumCores,
DmaNumPlugs: NumDmas,
DmaNumOutstandingBursts: 8,
DmaBurstLength: 256,
DmaBurstLength: 5, // Means bursts of 256 bytes: passed as 256 to mchan top, later computed inside iDMA
NumMstPeriphs: NB_MPERIPHS,
NumSlvPeriphs: NB_SPERIPHS,
ClusterAlias: 1,
Expand All @@ -227,9 +227,9 @@ package pulp_cluster_package;
HMRTmrFIxed: 0,
HMRInterleaveGrps: 1,
HMREnableRapidRecovery: 1,
HMRSeparateDataVoters:1,
HMRSeparateAxiBus:0,
HMRNumBusVoters:1,
HMRSeparateDataVoters: 1,
HMRSeparateAxiBus: 0,
HMRNumBusVoters: 1,
EnableECC: 1,
ECCInterco: 1,
iCacheNumBanks: 2,
Expand All @@ -240,19 +240,16 @@ package pulp_cluster_package;
iCachePrivateDataWidth: 32,
EnableReducedTag: 1,
L2Size: 1000*1024,
DmBaseAddr: 'h1A110000,
BootRomBaseAddr: 'h1A000000,
BootAddr: 'h1C000000,
DmBaseAddr: 'h60203000,
BootRomBaseAddr: 'h1C008080,
BootAddr: 'h1C008080,
EnablePrivateFpu: 1,
EnablePrivateFpDivSqrt: 0,
EnableSharedFpu: 0,
EnableSharedFpDivSqrt: 0,
NumSharedFpu: 0,
NumAxiIn: NumAxiSubordinatePorts,
NumAxiOut: NumAxiManagerPorts,
AxiIdInWidth: AxiSubordinateIdwidth,
AxiIdOutWidth:AxiManagerIdwidth,
AxiAddrWidth: 48,
AxiAddrWidth: 32,
AxiDataInWidth: 64,
AxiDataOutWidth: 64,
AxiUserWidth: 10,
Expand Down
17 changes: 8 additions & 9 deletions rtl/cluster_bus_wrap.sv
Original file line number Diff line number Diff line change
Expand Up @@ -107,7 +107,7 @@ module cluster_bus_wrap
`AXI_ASSIGN_RESP_STRUCT(axi_master_resps[1], periph_master_resp_i)
`AXI_ASSIGN_REQ_STRUCT(ext_master_req_o, axi_master_reqs[2])
`AXI_ASSIGN_RESP_STRUCT(axi_master_resps[2], ext_master_resp_i)

// Address Map Rule
typedef struct packed {
logic [AXI_ADDR_WIDTH-1:0] idx ;
Expand All @@ -131,28 +131,28 @@ module cluster_bus_wrap
start_addr: cluster_base_addr + ClusterPeripheralsOffs,
end_addr: cluster_base_addr + ClusterExternalOffs
};
assign addr_map[2] = '{ // everything above cluster to ext_slave
assign addr_map[2] = '{ // everything below cluster to ext_slave
idx: 2,
start_addr: cluster_base_addr + ClusterExternalOffs,
end_addr: 32'hFFFF_FFFF
end_addr: 'hFFFF_FFFF
};
assign addr_map[3] = '{ // everything below cluster
assign addr_map[3] = '{ // everything above cluster
idx: 2,
start_addr: 'h0,
end_addr: cluster_base_addr
};

localparam int unsigned MAX_TXNS_PER_SLV_PORT = (DMA_NB_OUTSND_BURSTS > NB_CORES) ?
DMA_NB_OUTSND_BURSTS : NB_CORES;
DMA_NB_OUTSND_BURSTS : NB_CORES;

localparam xbar_cfg_t AXI_XBAR_CFG = '{
NoSlvPorts: NB_SLAVE,
NoMstPorts: NB_MASTER,
MaxMstTrans: MAX_TXNS_PER_SLV_PORT, //The TCDM ports do not support
//outstanding transactiions anyways
//outstanding transactions anyways
MaxSlvTrans: DMA_NB_OUTSND_BURSTS + NB_CORES, //Allow up to 4 in-flight transactions
//per slave port
FallThrough: 1'b0, //Use the reccomended default config
FallThrough: 1'b0, //Use the recommended default config
LatencyMode: axi_pkg::NO_LATENCY, // CUT_ALL_AX | axi_pkg::DemuxW,
PipelineStages: 0,
AxiIdWidthSlvPorts: AXI_ID_IN_WIDTH,
Expand All @@ -163,7 +163,6 @@ module cluster_bus_wrap
NoAddrRules: N_RULES
};


axi_xbar #(
.Cfg ( AXI_XBAR_CFG ),
.ATOPs ( 1'b0 ),
Expand Down
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