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feat: add firtool and Verilog generation rules - #4

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MrAMS merged 7 commits into
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oharboe:feat-firtool-verilog
Aug 20, 2026
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feat: add firtool and Verilog generation rules#4
MrAMS merged 7 commits into
hw-bzl:masterfrom
oharboe:feat-firtool-verilog

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@oharboe

@oharboe oharboe commented Aug 10, 2026

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This PR adds fir_library, verilog_file and verilog_directory rules to rules_chisel which allows generating Verilog directly from Chisel FIRRTL using firtool. It includes downloading the firtool binary from CIRCT and integrating it.

This adds `fir_library`, `verilog_file` and `verilog_directory` to generate Verilog using circt/firtool.
This adds a test script and targets to ensure that fir_library, verilog_file and verilog_directory can successfully generate FIRRTL and emit Verilog via firtool.
Fixes CI failure on macOS by introducing a repository rule to fetch the correct circt archive based on the host OS.
@oharboe

oharboe commented Aug 10, 2026

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@MrAMS 🥺

@oharboe

oharboe commented Aug 11, 2026

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@UebelAndre 🥺 ?

@oharboe

oharboe commented Aug 19, 2026

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Ping?

@MrAMS MrAMS left a comment

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Oh, Sorry. LGTM 👍

@MrAMS
MrAMS merged commit b74fbe7 into hw-bzl:master Aug 20, 2026
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@oharboe

oharboe commented Aug 20, 2026

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Oh, Sorry. LGTM 👍

Thank you!

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2 participants