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1. fpga_life fpga_life Public

   Conway's game of life at 1 million FPS

   SystemVerilog 6

2. croc croc Public

   Forked from pulp-platform/croc

   forked tiny tapeout tracable riscV soc with build and sim environments. I've integrated a nist800-232 cipher adding control and dma in systemverilog with tests in C.

   SystemVerilog

3. CrossLink_LCD CrossLink_LCD Public

   Lattice FPGA verilog design using a CrossLink MIPIDPHYA hard IP cores for Mipi Dsi Tx of 2x4lane LCD display, total 8Gbps!

   Verilog 1 1

4. FlatFury FlatFury Public

   PCIe fpga project on the LiteFury Xilinx Artix-7 fpga dev board, Verilog created from scratch with a simplified flat hierarchy using the AXI4 pcie core.

   Verilog

5. fpga_rocket_launcher fpga_rocket_launcher Public

   Model rocket launch controller implemented in a FPGA chip

   SystemVerilog

6. tt_grid_tie_load tt_grid_tie_load Public

   60 Hz Grid‑Forming ASIC with Dump‑Load Control

   SystemVerilog 1 1