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Pull requests: diffblue/hw-cbmc

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Pull requests list

AIGER output
#1928 opened Jun 21, 2026 by kroening Collaborator • Draft
fastppa: word-level delay, area, and power estimation tool
#1927 opened Jun 21, 2026 by kroening Collaborator • Draft
1
Verilog: split synthesis into behavioral and structural cleanup Verilog
#1926 opened Jun 21, 2026 by kroening Collaborator • Draft
Verilog: support for let expressions with ports
#1925 opened Jun 21, 2026 by kroening Collaborator • Draft
SystemVerilog: named sequence/property ports Verilog
#1923 opened Jun 21, 2026 by kroening Collaborator • Draft
Verilog: preresolving identifiers Verilog
#1921 opened Jun 20, 2026 by kroening Collaborator • Draft
introduce verilog_let_typet Verilog
#1919 opened Jun 20, 2026 by kroening Collaborator • Draft
Verilog: derive identifier from annotated scope cleanup Verilog
#1912 opened Jun 19, 2026 by kroening Collaborator • Draft
verilog_identifier_exprt now has structured scope stack Verilog
#1910 opened Jun 19, 2026 by kroening Collaborator • Draft
Verilog: SystemVerilog interfaces
#1907 opened Jun 18, 2026 by kroening Collaborator • Draft
9 tasks done
Verilog: fix unsigned/signed parameter without explicit range Verilog
#1902 opened Jun 16, 2026 by kroening Collaborator • Draft
Verilog: $root module does not need ports cleanup Verilog
#1875 opened Jun 4, 2026 by kroening Collaborator • Draft
module types now contain the symbol set Verilog
#1869 opened May 24, 2026 by kroening Collaborator • Draft
annotate enum types with their identifier cleanup Verilog
#1863 opened May 22, 2026 by kroening Collaborator • Draft
use existing verilog_ebmc_languaget::typecheck_module for $root cleanup Verilog
#1855 opened May 17, 2026 by kroening Collaborator • Draft
RFC: pyebmc Python bindings design
#1848 opened May 10, 2026 by kroening Collaborator Loading…
19
Verilog: grammar for classes Verilog
#1842 opened May 4, 2026 by kroening Collaborator • Draft
move logic for SVA cover into the property encoding Verilog
#1827 opened Apr 24, 2026 by kroening Collaborator • Draft
New IC3/PDR engine
#1817 opened Apr 21, 2026 by kroening Collaborator • Draft
Verilog: grammar for programs Verilog
#1811 opened Apr 18, 2026 by kroening Collaborator • Draft
netlist conversion: split up vector equality constraints engines
#1802 opened Apr 12, 2026 by kroening Collaborator • Draft
BDD model checker: early variable quantification
#1801 opened Apr 9, 2026 by kroening Collaborator • Draft
Verilog: $root Verilog
#1797 opened Apr 8, 2026 by kroening Collaborator • Draft
SystemVerilog: property-typed ports for checkers Verilog
#1739 opened Mar 18, 2026 by kroening Collaborator • Draft
class interface for flex
#1695 opened Mar 4, 2026 by kroening Collaborator • Draft
2
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