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fix: skip discharge-calibration samples that cross the low-SoC derating threshold#97

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fix: skip discharge-calibration samples that cross the low-SoC derating threshold#97
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@bvweerd bvweerd commented Jul 14, 2026

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Description

The charge-efficiency calibration skips samples whose planned step crosses the high-SoC charge derating threshold, because the BMS throttles power mid-step and the actual/planned ratio then reflects derating rather than real efficiency. The discharge-efficiency calibration was missing the mirrored guard for the low-SoC discharge derating threshold.

Impact: on batteries with low-SoC discharge derating configured (e.g. Marstek Venus), every discharge step that crosses the threshold produces a spuriously low actual/planned ratio. The rolling 20-sample average drags the persisted discharge correction down (surviving restarts), making the DP plan systematically less discharge than the battery can actually deliver — even far away from the derating region.

Fix: add the symmetric skip in _update_discharge_eff_calibration (planned_next_soc < threshold_kwh <= prev_soc → no sample), identical in structure to the existing high-SoC guard in _update_charge_eff_calibration.

Type of change

  • fix: Bug fix (patch version bump)
  • feat: New feature (minor version bump)
  • feat!: / BREAKING CHANGE: Breaking change (major version bump)
  • chore: / docs: / ci: Maintenance or documentation (no version bump)

Checklist

  • Commit title follows Conventional Commits (feat:, fix:, chore:, etc.)
  • Tests added or updated where applicable
  • Documentation updated if needed
  • CI is green (local: pytest + pre-commit + mypy pass)
  • PR targets the dev branch (not main, unless this is a hotfix)

Screenshots / Logs (optional)

New tests: test_discharge_calibration_skips_when_crossing_low_soc_derating, test_discharge_calibration_samples_above_low_soc_derating.

🤖 Generated with Claude Code

https://claude.ai/code/session_01XWQRQEJXUxbp2CGFS18U9i


Generated by Claude Code

…ng threshold

The charge-efficiency calibration already skips samples whose planned step
crosses the high-SoC charge derating threshold, because the BMS throttles
power mid-step and the actual/planned ratio then reflects derating rather
than real efficiency. The discharge-efficiency calibration lacked the
mirrored guard: on batteries with low-SoC discharge derating (e.g. Marstek
Venus), every discharge step crossing the threshold produced a spuriously
low ratio, dragging the persisted discharge correction down and making the
DP plan systematically less discharge than the battery can deliver.

Add the symmetric low-SoC threshold check before sampling.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01XWQRQEJXUxbp2CGFS18U9i
@github-actions github-actions Bot added the bug Something isn't working as expected label Jul 14, 2026
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