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1. keccak-fpga-core keccak-fpga-core Public

   Keccak/SHA-3 family IP core in SystemVerilog. FIPS-202 + Ethereum Keccak-256 compliant, dual-licensed.

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2. aes128-fpga-core aes128-fpga-core Public

   AES-128 IP core in SystemVerilog. FIPS-197 compliant, dual-licensed, with secure (DPA-resistant) and pipelined variants.

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3. spi-fpga-core spi-fpga-core Public

   SPI master+slave IP core in SystemVerilog. All 4 modes (CPOL/CPHA), parametrizable bit-width, FIFO, optional AXI4-Lite wrapper.

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4. jtag-finder jtag-finder Public

   Open-source JTAG and SWD pinout discoverer for STM32G431RB Nucleo. Bare-metal C in 5.9 KB, 70 integration tests. JTAGulator-style brute-force IDCODE / DPIDR scan.

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5. cryptopals-c cryptopals-c Public

   Cryptopals Crypto Challenges - Sets 1, 2, 3 in C

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6. aes256-fpga-core aes256-fpga-core Public

   AES-256 FPGA IP core in SystemVerilog. FIPS-197 compliant, NIST-validated, dual-licensed.

   C++