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libcu++: atomic backend dispatch refactor - #10908

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griwes:feature/atomic-backend-refactor
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libcu++: atomic backend dispatch refactor#10908
griwes wants to merge 6 commits into
NVIDIA:mainfrom
griwes:feature/atomic-backend-refactor

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@griwes

@griwes griwes commented Aug 20, 2026

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Description

This PR massively refactors the internals of the implementation of cuda::{,std::}atomic{,_ref}. Main points are as follows:

  • Backends are first class. They are identified by structures that also carry information about how the dispatching logic will work.
  • The dispatching logic no longer chooses between different names for host/device paths; all interfaces now dispatch through the same names, using the backend tag structures as the dispatch point.
  • The PTX fallback logic has been promoted to a "generic" backend, which can fill holes in the native coverage when needed. It also now owns the logic for "need to do an operation, but have to widen to have a native instruction".
  • The generic backend now also owns a generic CAS-based RMW implementation, which is then used by the various RMW APIs that don't have native instructions available.
  • The names of the various elements of the implementation are now consistently prefixed as __cuda_atomic_*, not the prior ensemble of historical debt.
  • The top level dispatch to host/device is now uniform between the two, so it has been folded into dispatch macros, so that we no longer need to manually dispatch between host and device for every single API.

This is a large PR; I have attempted to split all the changes into smaller commits that should be at least somewhat reviewable. Reviewing this commit by commit is recommended.

Do not merge prior to closing of #10506.

Checklist

  • New or existing tests cover these changes.
  • The documentation is up to date with these changes.

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@cccl-authenticator-app cccl-authenticator-app Bot moved this from Todo to In Progress in CCCL Aug 20, 2026
@griwes

griwes commented Aug 20, 2026

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/ok to test a4384f0

@griwes
griwes requested review from davebayer, miscco and wmaxey August 20, 2026 00:29
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griwes commented Aug 20, 2026

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/ok to test 99bb8b9

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griwes commented Aug 20, 2026

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/ok to test 7ed88e2

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😬 CI Workflow Results

🟥 Finished in 1h 32m: Pass: 75%/117 | Total: 2d 13h | Max: 1h 31m | Hits: 54%/486751

See results here.

AI failure analysis

1. Windows macro expansion removes the `__bound` callable · 19 jobs

Explanation: Nineteen Windows nvcc builds fail while parsing the new fetch fallback dispatch. The compiler output shows the callable argument disappearing, leaving an empty argument between commas.

Evidence:

CUB nvcc MSVC / [CTK13.3 MSVC14.50 C++20] BuildNoLaunch(amd64): sm{86}, step 4

2026-08-20T01:19:41.0377493Z C:\cccl\libcudacxx\include\cuda/std/__atomic/functions/dispatch.h(71): error: expected an expression

cudax nvcc MSVC / [CTK13.3 MSVC14.50 C++20] Build(amd64): sm{75}, step 4

2026-08-20T01:19:21.1890242Z C:\cccl\libcudacxx\include\cuda/std/__atomic/functions/dispatch.h(71): error: expected an expression

CUB nvcc MSVC / [CTK13.3 MSVC14.50 C++20] BuildHostLaunch(amd64): sm{86}, step 4

2026-08-20T01:21:04.2922180Z C:\cccl\libcudacxx\include\cuda/std/__atomic/functions/dispatch.h(71): error: expected an expression

Root cause: The new local variable is named `__bound`, which collides with a Windows toolchain macro and preprocesses to nothing. Both affected calls therefore contain an empty second argument. Sources: libcudacxx/include/cuda/std/__atomic/functions/dispatch.h:69, libcudacxx/include/cuda/std/__atomic/functions/dispatch.h:71, libcudacxx/include/cuda/std/__atomic/functions/dispatch.h:98, libcudacxx/include/cuda/std/__atomic/functions/dispatch.h:100.

Suggested next steps: Rename the two exact `__bound` locals to collision-resistant names such as `__bound_fetch_fallback` and `__bound_fetch_sub`, then rerun one Windows nvcc header build before the broader Windows matrix.

Copy this prompt into a coding agent
Repository: https://github.com/NVIDIA/cccl
Workflow run: https://github.com/NVIDIA/cccl/actions/runs/32319694133
Failure group: Windows macro expansion removes the `__bound` callable
Affected jobs:
- CUB nvcc MSVC / [CTK13.3 MSVC14.50 C++20] BuildNoLaunch(amd64): sm{86}: https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491135
- cudax nvcc MSVC / [CTK13.3 MSVC14.50 C++20] Build(amd64): sm{75}: https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491145
- CUB nvcc MSVC / [CTK13.3 MSVC14.50 C++20] BuildHostLaunch(amd64): sm{86}: https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491168
- CCCL C Parallel nvcc MSVC / [CTK13.3 MSVC14.44] Build(amd64): sm{75}: https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491196
- libcu++ nvcc MSVC / [CTK12.0 MSVC14.29 C++17] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491265
- libcu++ nvcc MSVC / [CTK12.0 MSVC14.39 C++17] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491289
- libcu++ nvcc MSVC / [CTK12.9 MSVC14.44 C++20] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491298
- libcu++ nvcc MSVC / [CTK13.3 MSVC14.44 C++20] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491340
- libcu++ nvcc MSVC / [CTK12.0 MSVC14.39 C++20] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491351
- libcu++ nvcc MSVC / [CTK13.0 MSVC14.44 C++20] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491357
- libcu++ nvcc MSVC / [CTK13.0 MSVC14.44 C++17] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491362
- libcu++ nvcc MSVC / [CTK13.3 MSVC14.50 C++20] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491396
- libcu++ nvcc MSVC / [CTK13.3 MSVC14.29 C++17] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491416
- libcu++ nvcc MSVC / [CTK13.3 MSVC14.50 C++17] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491420
- libcu++ nvcc MSVC / [CTK12.9 MSVC14.29 C++17] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491435
- libcu++ nvcc MSVC / [CTK13.0 MSVC14.29 C++17] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491461
- libcu++ nvcc MSVC / [CTK12.9 MSVC14.44 C++17] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491482
- Python nvcc MSVC / HU / [CTK12.9 MSVC14.44 py3.14] Build cuda.cccl(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279492457
- Thrust nvcc MSVC / IA / [CTK13.3 MSVC14.50 C++20] Build(amd64): sm{89}: https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279492692

Reproduce the Windows nvcc parse failure narrowly and inspect preprocessed output around `__cuda_atomic_fetch_fallback_dispatch`. Rename the exact local identifier `__bound` in `libcudacxx/include/cuda/std/__atomic/functions/dispatch.h` at both fetch dispatch sites to descriptive non-macro names, update their uses, search the atomic refactor for any other exact `__bound` identifiers, and run a focused Windows nvcc header compile followed by the affected libcudacxx/CUB target validation.

Jobs:

2. GCC 7 maps 32-bit atomics to the 128-bit proxy · 2 jobs

Explanation: Both GCC 7 public-header builds instantiate the experimental 128-bit host implementation while compiling ordinary `atomic<int>` operations. This makes merely including and instantiating the public atomic API fail without the experimental opt-in.

Evidence:

libcu++ nvcc GCC / [CTK12.0 GCC7 C++17] Build(amd64), step 4

2026-08-20T01:29:25.2375370Z /home/coder/cccl/lib/cmake/libcudacxx/../../../libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_generated.h:1839:37:   required from ‘void cuda::std::__4::__cuda_atomic_store_dispatch(_Backend, volatile _Type*, _Up, cuda::std::__4::memory_order, _Sco) [with _Backend = cuda::std::__4::__cuda_atomic_host_backend; _Type = int; _Up = int; _Sco = cuda::std::__4::__thread_scope_tag; cuda::std::__4::memory_order = cuda::std::__4::memory_order]’
2026-08-20T01:29:25.2383338Z /home/coder/cccl/lib/cmake/libcudacxx/../../../libcudacxx/include/cuda/std/__atomic/functions/host.h:48:7: error: static assertion failed: CCCL has detected possible support for 128 bit atomics. However this feature is experimental. You can define CCCL_ENABLE_EXPERIMENTAL_HOST_ATOMICS_128B to ignore and acknowledge that runtime corruption may occur if you link with libatomic and use locked atomics.

libcu++ nvcc GCC / [CTK12.9 GCC7 C++17] Build(amd64), step 4

2026-08-20T01:30:44.2637569Z /home/coder/cccl/lib/cmake/libcudacxx/../../../libcudacxx/include/cuda/std/__atomic/functions/host.h:48:7: error: static assertion failed: CCCL has detected possible support for 128 bit atomics. However this feature is experimental. You can define CCCL_ENABLE_EXPERIMENTAL_HOST_ATOMICS_128B to ignore and acknowledge that runtime corruption may occur if you link with libatomic and use locked atomics.

Root cause: The new `__cuda_atomic_deduce_bitwise` implementation uses `__type_switch` with a 128-bit default, and under GCC 7 the observed instantiation for `_Type = int` resolves to `__cuda_atomic_longlong2`. That erroneous proxy selection reaches the intentional host 128-bit static assertion; the logs do not establish whether this is a GCC 7 alias-template limitation or a defect in the switch expression itself. Sources: libcudacxx/include/cuda/std/__atomic/functions/backend.h:279, libcudacxx/include/cuda/std/__atomic/functions/backend.h:286, libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_generated.h:1828, libcudacxx/include/cuda/std/__atomic/functions/host.h:48.

Suggested next steps: Add a GCC 7 compile-time check that the bitwise deduction for 1/2/4/8-byte types selects the matching proxy, then replace or adjust the `__type_switch` formulation if it fails. Validate with `cmake --build <gcc7-build-dir> --target libcudacxx.test.public_headers_host_only.base`.

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Repository: https://github.com/NVIDIA/cccl
Workflow run: https://github.com/NVIDIA/cccl/actions/runs/32319694133
Failure group: GCC 7 maps 32-bit atomics to the 128-bit proxy
Affected jobs:
- libcu++ nvcc GCC / [CTK12.0 GCC7 C++17] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279492076
- libcu++ nvcc GCC / [CTK12.9 GCC7 C++17] Build(amd64): https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279492109

Reproduce the GCC 7 public-header failure for `cuda/atomic` and verify the types produced by `__cuda_atomic_deduce_bitwise<int>` and the other 1/2/4/8-byte cases. Fix `libcudacxx/include/cuda/std/__atomic/functions/backend.h` so every supported size deterministically selects its matching integer proxy on GCC 7 and only 16-byte types select `__cuda_atomic_longlong2`; prefer a simple nested conditional or explicit size-specialized trait if `__type_switch` is unreliable. Regenerate dependent output if necessary, run the focused GCC 7 public-header target, and confirm 128-bit operations still retain the experimental host guard.

Jobs:

3. Generated fence code leaves `__memorder` unused under Clang CUDA · 3 jobs

Explanation: All three Clang 21 CUDA configurations fail their first lit compilations because warnings are errors and the generated thread-fence function declares an unused `__memorder`. The failure affects thousands of tests that include the atomic headers.

Evidence:

libcu++ ClangCUDA / [CTK12.9 Clang21 C++20] Build(amd64): sm{75;80;90;100;120}, step 4

2026-08-20T01:34:41.4123056Z /home/coder/cccl/libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_generated.h:78:13: error: unused variable '__memorder' [-Werror,-Wunused-variable]

libcu++ ClangCUDA / [CTK12.9 Clang21 C++17] Build(amd64): sm{75;80;90;100;120}, step 4

2026-08-20T01:33:59.5779842Z /home/coder/cccl/libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_generated.h:78:13: error: unused variable '__memorder' [-Werror,-Wunused-variable]

libcu++ ClangCUDA / [CTK12.9 Clang21 C++23] Build(amd64): sm{75;80;90;100;120}, step 4

2026-08-20T01:33:17.2229414Z /home/coder/cccl/libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_generated.h:78:13: error: unused variable '__memorder' [-Werror,-Wunused-variable]

Root cause: For some Clang CUDA compilation passes, `NV_DISPATCH_TARGET` removes the branches that reference `__memorder`, but the variable remains declared. Because libcudacxx lit builds use `-Werror`, this warning stops compilation. Sources: libcudacxx/codegen/generators/fence.h:83, libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_generated.h:78.

Suggested next steps: Mark the generated variable `[[maybe_unused]]` or move order conversion into the branches that consume it, then regenerate `cuda_ptx_generated.h`. Validate with `cmake --build <clang21-build-dir> --target libcudacxx.test.lit.precompile`.

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Repository: https://github.com/NVIDIA/cccl
Workflow run: https://github.com/NVIDIA/cccl/actions/runs/32319694133
Failure group: Generated fence code leaves `__memorder` unused under Clang CUDA
Affected jobs:
- libcu++ ClangCUDA / [CTK12.9 Clang21 C++20] Build(amd64): sm{75;80;90;100;120}: https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491456
- libcu++ ClangCUDA / [CTK12.9 Clang21 C++17] Build(amd64): sm{75;80;90;100;120}: https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491493
- libcu++ ClangCUDA / [CTK12.9 Clang21 C++23] Build(amd64): sm{75;80;90;100;120}: https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96279491497

Reproduce one Clang 21 CUDA lit compile with `-Werror` and fix the fence generator rather than only editing generated output. In `libcudacxx/codegen/generators/fence.h`, make `__memorder` valid when `NV_DISPATCH_TARGET` removes all uses—prefer `[[maybe_unused]] const int __memorder = __atomic_order_to_int(__order);` unless moving conversion into branches is cleaner—regenerate `libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_generated.h`, and run the focused lit precompile target for one C++17 or C++20 Clang CUDA configuration.

Jobs:

4. 16-byte atomic-ref runtime exceeds the lit timeout · 1 job

Explanation: The H100 test build completes most of the suite, but the 16-byte integral `atomic_ref` executable never finishes before the per-test timeout. This leaves the test unresolved and fails the test target.

Evidence:

libcu++ nvcc GCC / FU / [CTK13.3 GCC15 C++20] Test(amd64, H100 2-GPU): sm{90}, step 4

2026-08-20T01:46:30.5712131Z 114: UNRESOLVED: libcu++ :: std/atomics/atomics.types.generic/integral/16b_integral_ref.pass.cpp (1863 of 3809)
2026-08-20T01:46:30.5718062Z 114: Exception during script execution:
2026-08-20T01:46:30.5757684Z 114:     out, err, rc = executeCommand(cmd, cwd=work_dir, env=env, timeout=self.timeout)

Root cause: The refactored 128-bit atomic path causes the test executable to hang or regress beyond the timeout, plausibly in the new generic CAS retry loop. The killed process produced no operation-level trace, so the logs cannot identify which load, exchange, compare-exchange, or fetch operation fails to make progress. Sources: libcudacxx/test/libcudacxx/std/atomics/atomics.types.generic/integral/16b_integral_ref.pass.cpp:105, libcudacxx/test/libcudacxx/std/atomics/atomics.types.generic/integral/16b_integral_ref.pass.cpp:175, libcudacxx/include/cuda/std/__atomic/functions/generic_rmw.h:181, libcudacxx/include/cuda/std/__atomic/functions/generic_rmw.h:191.

Suggested next steps: Run only this lit test on an H100 with a shorter timeout and temporary progress markers to isolate the first hanging operation; do not increase the timeout as the primary fix. Use `LIBCUDACXX_SITE_CONFIG=<build>/libcudacxx/test/libcudacxx/lit.site.cfg lit -v libcudacxx/test/libcudacxx/std/atomics/atomics.types.generic/integral/16b_integral_ref.pass.cpp`.

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Repository: https://github.com/NVIDIA/cccl
Workflow run: https://github.com/NVIDIA/cccl/actions/runs/32319694133
Failure group: 16-byte atomic-ref runtime exceeds the lit timeout
Affected jobs:
- libcu++ nvcc GCC / FU / [CTK13.3 GCC15 C++20] Test(amd64, H100 2-GPU): sm{90}: https://github.com/NVIDIA/cccl/actions/runs/32319694133/job/96284234757

Reproduce `std/atomics/atomics.types.generic/integral/16b_integral_ref.pass.cpp` alone on an H100 using the generated lit site configuration. Instrument or split the test narrowly to identify the first 128-bit atomic operation that does not complete, inspect the new PTX backend and `__cuda_atomic_rmw` compare-exchange loop for incorrect expected-value updates, order dispatch, alignment, or CAS operand selection, implement the minimal progress/correctness fix, remove temporary instrumentation, and rerun this test plus adjacent 16-byte atomic tests.

Jobs:

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Suggestion: I would start with a PR that just does the rename to __cuda_atomic then followed by some of the cleanups like adding _CCCL_HOST_DEVICE_API and so on

That would massively limit the scope of this PR

out << R"XXX(
template <class _Fn, class _Sco>
static inline _CCCL_DEVICE bool __cuda_atomic_compare_swap_memory_order_dispatch(_Fn& __cuda_cas, int __success_memorder, int __failure_memorder, _Sco) {
static inline _CCCL_DEVICE bool __cuda_atomic_compare_exchange_order_dispatch(

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Nitpick: This could be

static _CCCL_DEVICE_API bool

template <typename _Atomic_Memorder>
inline _CCCL_DEVICE bool operator()(_Atomic_Memorder) {
return __cuda_atomic_compare_exchange(__ptr, *__exp, *__exp, *__des, _Atomic_Memorder{}, _Tag{}, _Sco{});
_CCCL_HOST_DEVICE_API bool operator()(_Atomic_Memorder __order) {

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Nitpick: We should add [[nodiscard]] to the internal APIs

{
using __proxy_t = typename __atomic_cuda_deduce_bitwise<_Type>::__type;
using __proxy_tag = typename __atomic_cuda_deduce_bitwise<_Type>::__tag;
using __proxy_t = typename __cuda_atomic_deduce_bitwise<_Type>::__type;

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Nitpick: The compiler greatly prefers type aliases. We should introduce __cuda_atomic_deduce_bitwise_t

Comment on lines +156 to +198
template <class _Order>
struct __cuda_atomic_initial_load_order
{
using type = __cuda_atomic_order_relaxed;

[[nodiscard]] _CCCL_HOST_DEVICE_API static constexpr type __make()
{
return {};
}
};

template <>
struct __cuda_atomic_initial_load_order<__cuda_atomic_order_volatile>
{
using type = __cuda_atomic_order_volatile;

[[nodiscard]] _CCCL_HOST_DEVICE_API static constexpr type __make()
{
return {};
}
};

template <>
struct __cuda_atomic_initial_load_order<memory_order>
{
using type = memory_order;

[[nodiscard]] _CCCL_HOST_DEVICE_API static constexpr type __make()
{
return memory_order_relaxed;
}
};

template <>
struct __cuda_atomic_initial_load_order<__cuda_atomic_runtime_cas_order>
{
using type = memory_order;

[[nodiscard]] _CCCL_HOST_DEVICE_API static constexpr type __make()
{
return memory_order_relaxed;
}
};

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Important: This should just be a consteval function that returns the appropriate enum value in a if constexpr chain

That would be much cheaper to compile

Comment on lines +279 to +326
template <class _Type>
using __cuda_atomic_deduce_bitwise =
__type_switch<sizeof(_Type),
__type_case<1, __cuda_atomic_operand_deduction<uint8_t, __cuda_atomic_operand_b8>>,
__type_case<2, __cuda_atomic_operand_deduction<uint16_t, __cuda_atomic_operand_b16>>,
__type_case<4, __cuda_atomic_operand_deduction<uint32_t, __cuda_atomic_operand_b32>>,
__type_case<8, __cuda_atomic_operand_deduction<uint64_t, __cuda_atomic_operand_b64>>,
__type_default<__cuda_atomic_operand_deduction<__cuda_atomic_longlong2, __cuda_atomic_operand_b128>>>;

template <class _Type>
using __cuda_atomic_deduce_arithmetic = _If<
is_floating_point_v<_Type>,
_If<sizeof(_Type) == 4,
__cuda_atomic_operand_deduction<float, __cuda_atomic_operand_f32>,
__cuda_atomic_operand_deduction<double, __cuda_atomic_operand_f64>>,
_If<is_signed_v<_Type>,
__type_switch<sizeof(_Type),
__type_case<1, __cuda_atomic_operand_deduction<int8_t, __cuda_atomic_operand_s8>>,
__type_case<2, __cuda_atomic_operand_deduction<int16_t, __cuda_atomic_operand_s16>>,
__type_case<4, __cuda_atomic_operand_deduction<int32_t, __cuda_atomic_operand_s32>>,
__type_default<__cuda_atomic_operand_deduction<int64_t, __cuda_atomic_operand_u64>>>, // There is no
// atom.add.s64
__type_switch<sizeof(_Type),
__type_case<1, __cuda_atomic_operand_deduction<uint8_t, __cuda_atomic_operand_u8>>,
__type_case<2, __cuda_atomic_operand_deduction<uint16_t, __cuda_atomic_operand_u16>>,
__type_case<4, __cuda_atomic_operand_deduction<uint32_t, __cuda_atomic_operand_u32>>,
__type_default<__cuda_atomic_operand_deduction<uint64_t, __cuda_atomic_operand_u64>>>>>;

template <class _Type>
using __cuda_atomic_deduce_minmax = _If<
is_floating_point_v<_Type>,
_If<sizeof(_Type) == 4,
__cuda_atomic_operand_deduction<float, __cuda_atomic_operand_f32>,
__cuda_atomic_operand_deduction<double, __cuda_atomic_operand_f64>>,
_If<is_signed_v<_Type>,
__type_switch<sizeof(_Type),
__type_case<1, __cuda_atomic_operand_deduction<int8_t, __cuda_atomic_operand_s8>>,
__type_case<2, __cuda_atomic_operand_deduction<int16_t, __cuda_atomic_operand_s16>>,
__type_case<4, __cuda_atomic_operand_deduction<int32_t, __cuda_atomic_operand_s32>>,
__type_default<__cuda_atomic_operand_deduction<int64_t, __cuda_atomic_operand_s64>>>, // atom.min|max.s64
// supported
__type_switch<sizeof(_Type),
__type_case<1, __cuda_atomic_operand_deduction<uint8_t, __cuda_atomic_operand_u8>>,
__type_case<2, __cuda_atomic_operand_deduction<uint16_t, __cuda_atomic_operand_u16>>,
__type_case<4, __cuda_atomic_operand_deduction<uint32_t, __cuda_atomic_operand_u32>>,
__type_default<__cuda_atomic_operand_deduction<uint64_t, __cuda_atomic_operand_u64>>>>>;

_CCCL_END_NAMESPACE_CUDA_STD

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Nitpick: I believe all of those are more efficient and more readable if turned into consteval functions with if constexpr chains

@griwes

griwes commented Aug 20, 2026

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@miscco I can pull out the renaming into its own commit in the series; that should be fairly reviewable, and not having to track multiple dependent PRs would make my life easier. But if you'd really prefer, I can extract it to a separate PR.

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