diff --git a/.github/workflows/stdarch.yml b/.github/workflows/stdarch.yml index a437f06a465..3d2ffa57dff 100644 --- a/.github/workflows/stdarch.yml +++ b/.github/workflows/stdarch.yml @@ -95,8 +95,8 @@ jobs: if: ${{ matrix.cargo_runner }} run: | # FIXME: these tests fail when the sysroot is compiled with LTO because of a missing symbol in proc-macro. - # FIXME: remove --skip test_tile_ when it's implemented. - STDARCH_TEST_SKIP_FUNCTION="xsave,xsaveopt,xsave64,xsaveopt64" STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a --skip test_tile_ + # FIXME: remove --skip test_tile_ and --skip --skip test__tile when it's implemented. + STDARCH_TEST_SKIP_FUNCTION="xsave,xsaveopt,xsave64,xsaveopt64" STDARCH_TEST_EVERYTHING=1 CHANNEL=release CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="${{ matrix.cargo_runner }}" TARGET=x86_64-unknown-linux-gnu CG_RUSTFLAGS="-Ainternal_features" ./y.sh cargo test --manifest-path build/build_sysroot/sysroot_src/library/stdarch/Cargo.toml -- --skip rtm --skip tbm --skip sse4a --skip test_tile_ --skip test__tile # Summary job for the merge queue. # ALL THE PREVIOUS JOBS NEED TO BE ADDED TO THE `needs` SECTION OF THIS JOB! diff --git a/build_system/src/test.rs b/build_system/src/test.rs index dd04cf1bd3e..eda31418842 100644 --- a/build_system/src/test.rs +++ b/build_system/src/test.rs @@ -915,8 +915,6 @@ fn valid_ui_error_pattern_test(file: &str) -> bool { "type-alias-impl-trait/auxiliary/cross_crate_ice.rs", "type-alias-impl-trait/auxiliary/cross_crate_ice2.rs", "macros/rfc-2011-nicer-assert-messages/auxiliary/common.rs", - "imports/ambiguous-1.rs", - "imports/ambiguous-4-extern.rs", "entry-point/auxiliary/bad_main_functions.rs", ] .iter() diff --git a/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch b/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch deleted file mode 100644 index 3a8c37a8b8d..00000000000 --- a/patches/0001-Add-stdarch-Cargo.toml-for-testing.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 190e26c9274b3c93a9ee3516b395590e6bd9213b Mon Sep 17 00:00:00 2001 -From: None -Date: Sun, 3 Aug 2025 19:54:56 -0400 -Subject: [PATCH] Patch 0001-Add-stdarch-Cargo.toml-for-testing.patch - ---- - library/stdarch/Cargo.toml | 20 ++++++++++++++++++++ - 1 file changed, 20 insertions(+) - create mode 100644 library/stdarch/Cargo.toml - -diff --git a/library/stdarch/Cargo.toml b/library/stdarch/Cargo.toml -new file mode 100644 -index 0000000..bd6725c ---- /dev/null -+++ b/library/stdarch/Cargo.toml -@@ -0,0 +1,20 @@ -+[workspace] -+resolver = "1" -+members = [ -+ "crates/*", -+ #"examples/" -+] -+exclude = [ -+ "crates/wasm-assert-instr-tests", -+ "rust_programs", -+] -+ -+[profile.release] -+debug = true -+opt-level = 3 -+incremental = true -+ -+[profile.bench] -+debug = 1 -+opt-level = 3 -+incremental = true --- -2.50.1 - diff --git a/rust-toolchain b/rust-toolchain index 7860423093b..ee95f8e6e1c 100644 --- a/rust-toolchain +++ b/rust-toolchain @@ -1,3 +1,3 @@ [toolchain] -channel = "nightly-2026-05-28" +channel = "nightly-2026-06-28" components = ["rust-src", "rustc-dev", "llvm-tools-preview"] diff --git a/src/abi.rs b/src/abi.rs index 7239a5bcb04..1b7bb8c9077 100644 --- a/src/abi.rs +++ b/src/abi.rs @@ -10,7 +10,7 @@ use rustc_middle::bug; use rustc_middle::ty::Ty; use rustc_middle::ty::layout::LayoutOf; #[cfg(feature = "master")] -use rustc_session::config; +use rustc_session::{Session, config}; use rustc_target::callconv::{ArgAttributes, CastTarget, FnAbi, PassMode}; #[cfg(feature = "master")] use rustc_target::spec::Arch; @@ -46,7 +46,7 @@ impl GccType for CastTarget { ) }; - if self.prefix.iter().all(|x| x.is_none()) { + if self.prefix.is_empty() { // Simplify to a single unit when there is no prefix and size <= unit size if self.rest.total <= self.rest.unit.size { return rest_gcc_unit; @@ -62,7 +62,7 @@ impl GccType for CastTarget { let mut args: Vec<_> = self .prefix .iter() - .flat_map(|option_reg| option_reg.map(|reg| reg.gcc_type(cx))) + .map(|reg| reg.gcc_type(cx)) .chain((0..rest_count).map(|_| rest_gcc_unit)) .collect(); @@ -230,32 +230,43 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> { #[cfg(feature = "master")] fn gcc_cconv(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Option> { - conv_to_fn_attribute(self.conv, &cx.tcx.sess.target.arch) + conv_to_fn_attribute(cx.sess(), self.conv) } } #[cfg(feature = "master")] -pub fn conv_to_fn_attribute<'gcc>(conv: CanonAbi, arch: &Arch) -> Option> { +pub fn conv_to_fn_attribute<'gcc>(sess: &Session, conv: CanonAbi) -> Option> { let attribute = match conv { CanonAbi::C | CanonAbi::Rust => return None, - // gcc/gccjit does not have anything for this. - CanonAbi::RustPreserveNone => return None, + CanonAbi::RustPreserveNone => { + // This calling convention is LLVM-specific and unspecified. + sess.dcx() + .fatal("gcc/gccjit backend does not support RustPreserveNone calling convention") + } + CanonAbi::RustTail => { + // This calling convention is LLVM-specific and unspecified. + sess.dcx().fatal("gcc/gccjit backend does not support RustTail calling convention") + } CanonAbi::RustCold => FnAttribute::Cold, // Functions with this calling convention can only be called from assembly, but it is // possible to declare an `extern "custom"` block, so the backend still needs a calling // convention for declaring foreign functions. CanonAbi::Custom => return None, - // gcc/gccjit does not have anything for Swift's calling convention. - CanonAbi::Swift => panic!("gcc/gccjit backend does not support Swift calling convention"), + CanonAbi::Swift => { + // gcc/gccjit does not have anything for Swift's calling convention. + sess.dcx().fatal("gcc/gccjit backend does not support Swift calling convention") + } CanonAbi::Arm(arm_call) => match arm_call { ArmCall::CCmseNonSecureCall => FnAttribute::ArmCmseNonsecureCall, ArmCall::CCmseNonSecureEntry => FnAttribute::ArmCmseNonsecureEntry, ArmCall::Aapcs => FnAttribute::ArmPcs("aapcs"), }, - CanonAbi::GpuKernel => match arch { + CanonAbi::GpuKernel => match &sess.target.arch { &Arch::AmdGpu => FnAttribute::GcnAmdGpuHsaKernel, &Arch::Nvptx64 => FnAttribute::NvptxKernel, - arch => panic!("Arch {arch} does not support GpuKernel calling convention"), + arch => sess + .dcx() + .fatal(format!("Arch {arch} does not support GpuKernel calling convention")), }, // FIXME(antoyo): check if those AVR attributes are mapped correctly. CanonAbi::Interrupt(interrupt_kind) => match interrupt_kind { diff --git a/src/asm.rs b/src/asm.rs index a61963f7f79..cd652db0400 100644 --- a/src/asm.rs +++ b/src/asm.rs @@ -690,6 +690,8 @@ fn reg_class_to_gcc(reg_class: InlineAsmRegClass) -> &'static str { InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => { unreachable!("clobber-only") } + InlineAsmRegClass::Amdgpu(AmdgpuInlineAsmRegClass::Sgpr(_)) => "Sg", + InlineAsmRegClass::Amdgpu(AmdgpuInlineAsmRegClass::Vgpr(_)) => "v", InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => "r", InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg) | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg_low16) @@ -764,6 +766,11 @@ fn reg_class_to_gcc(reg_class: InlineAsmRegClass) -> &'static str { | X86InlineAsmRegClass::mmx_reg | X86InlineAsmRegClass::tmm_reg, ) => unreachable!("clobber-only"), + InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => "r", + InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => "f", + InlineAsmRegClass::Xtensa( + XtensaInlineAsmRegClass::sreg | XtensaInlineAsmRegClass::breg, + ) => unreachable!("clobber-only"), InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => { bug!("GCC backend does not support SPIR-V") } @@ -793,6 +800,7 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => { unreachable!("clobber-only") } + InlineAsmRegClass::Amdgpu(_) => cx.type_i32(), InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => cx.type_i32(), InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg) | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16) => cx.type_f32(), @@ -885,6 +893,11 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => { bug!("GCC backend does not support SPIR-V") } + InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => cx.type_i32(), + InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => cx.type_f32(), + InlineAsmRegClass::Xtensa( + XtensaInlineAsmRegClass::sreg | XtensaInlineAsmRegClass::breg, + ) => unreachable!("clobber-only"), InlineAsmRegClass::Err => unreachable!(), } } @@ -996,6 +1009,7 @@ fn modifier_to_gcc( InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => { unreachable!("clobber-only") } + InlineAsmRegClass::Amdgpu(_) => None, InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => None, InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg) | InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg_low16) => None, @@ -1083,6 +1097,7 @@ fn modifier_to_gcc( InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => { bug!("LLVM backend does not support SPIR-V") } + InlineAsmRegClass::Xtensa(_) => None, InlineAsmRegClass::Err => unreachable!(), } } diff --git a/src/builder.rs b/src/builder.rs index 76bd37396a1..997f0429c4d 100644 --- a/src/builder.rs +++ b/src/builder.rs @@ -1013,7 +1013,8 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> { loaded_value.to_rvalue() } - fn volatile_load(&mut self, ty: Type<'gcc>, ptr: RValue<'gcc>) -> RValue<'gcc> { + fn volatile_load(&mut self, ty: Type<'gcc>, ptr: RValue<'gcc>, _: Align) -> RValue<'gcc> { + // FIXME(antoyo): set alignment. let ptr = self.context.new_cast(self.location, ptr, ty.make_volatile().make_pointer()); // (FractalFir): We insert a local here, to ensure this volatile load can't move across // blocks. @@ -1479,6 +1480,10 @@ impl<'a, 'gcc, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'gcc, 'tcx> { ); } + fn vscale(&mut self, _: Self::Type) -> Self::Value { + unimplemented!("`rustc_codegen_gcc` doesn't support scalable vectors yet") + } + fn select( &mut self, cond: RValue<'gcc>, diff --git a/src/common.rs b/src/common.rs index dd0064d34bc..2e6fcf29bba 100644 --- a/src/common.rs +++ b/src/common.rs @@ -61,10 +61,11 @@ pub fn bytes_in_context<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, bytes: &[u8]) -> let context = &cx.context; let byte_type = context.new_type::(); let typ = new_array_type(context, None, byte_type, bytes.len() as u64 / 8); - let elements: Vec<_> = bytes - .chunks_exact(8) - .map(|arr| { - let arr: [u8; 8] = arr.try_into().unwrap(); + let (arrays, remainder) = bytes.as_chunks::<8>(); + debug_assert!(remainder.is_empty()); + let elements: Vec<_> = arrays + .iter() + .map(|&arr| { context.new_rvalue_from_long( byte_type, // Since we are representing arbitrary byte runs as integers, we need to follow the target @@ -82,10 +83,11 @@ pub fn bytes_in_context<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, bytes: &[u8]) -> let context = &cx.context; let byte_type = context.new_type::(); let typ = new_array_type(context, None, byte_type, bytes.len() as u64 / 4); - let elements: Vec<_> = bytes - .chunks_exact(4) - .map(|arr| { - let arr: [u8; 4] = arr.try_into().unwrap(); + let (arrays, remainder) = bytes.as_chunks::<4>(); + debug_assert!(remainder.is_empty()); + let elements: Vec<_> = arrays + .iter() + .map(|&arr| { context.new_rvalue_from_int( byte_type, match cx.sess().target.options.endian { diff --git a/src/context.rs b/src/context.rs index ed313859aea..ea71546ea1c 100644 --- a/src/context.rs +++ b/src/context.rs @@ -486,10 +486,10 @@ impl<'gcc, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> { fn declare_c_main(&self, fn_type: Self::Type) -> Option { let entry_name = self.sess().target.entry_name.as_ref(); if !self.functions.borrow().contains_key(entry_name) { - #[cfg(feature = "master")] - let conv = conv_to_fn_attribute(self.sess().target.entry_abi, &self.sess().target.arch); - #[cfg(not(feature = "master"))] - let conv = None; + let conv = cfg_select! { + feature = "master" => conv_to_fn_attribute(self.sess(), self.sess().target.entry_abi), + _ => None, + }; Some(self.declare_entry_fn(entry_name, fn_type, conv)) } else { // If the symbol already exists, it is an error: for example, the user wrote diff --git a/src/debuginfo.rs b/src/debuginfo.rs index cf938a3988c..8907d8a42b3 100644 --- a/src/debuginfo.rs +++ b/src/debuginfo.rs @@ -3,13 +3,9 @@ use std::sync::Arc; use gccjit::{Function, Location, RValue}; use rustc_abi::Size; -use rustc_codegen_ssa::mir::debuginfo::{DebugScope, FunctionDebugContext, VariableKind}; +use rustc_codegen_ssa::mir::debuginfo::VariableKind; use rustc_codegen_ssa::traits::{DebugInfoBuilderMethods, DebugInfoCodegenMethods}; -use rustc_index::bit_set::DenseBitSet; -use rustc_index::{Idx, IndexVec}; -use rustc_middle::mir::{self, Body, SourceScope}; use rustc_middle::ty::{ExistentialTraitRef, Instance, Ty}; -use rustc_session::config::DebugInfo; use rustc_span::{BytePos, Pos, SourceFile, SourceFileAndLine, Span, Symbol}; use rustc_target::callconv::FnAbi; @@ -65,115 +61,6 @@ impl<'a, 'gcc, 'tcx> DebugInfoBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tcx> { } } -/// Generate the `debug_context` in an MIR Body. -/// # Source of Origin -/// Copied from `create_scope_map.rs` of rustc_codegen_llvm -fn compute_mir_scopes<'gcc, 'tcx>( - cx: &CodegenCx<'gcc, 'tcx>, - instance: Instance<'tcx>, - mir: &Body<'tcx>, - debug_context: &mut FunctionDebugContext<'tcx, (), Location<'gcc>>, -) { - // Find all scopes with variables defined in them. - let variables = if cx.sess().opts.debuginfo == DebugInfo::Full { - let mut vars = DenseBitSet::new_empty(mir.source_scopes.len()); - // FIXME(eddyb) take into account that arguments always have debuginfo, - // irrespective of their name (assuming full debuginfo is enabled). - // NOTE(eddyb) actually, on second thought, those are always in the - // function scope, which always exists. - for var_debug_info in &mir.var_debug_info { - vars.insert(var_debug_info.source_info.scope); - } - Some(vars) - } else { - // Nothing to emit, of course. - None - }; - let mut instantiated = DenseBitSet::new_empty(mir.source_scopes.len()); - // Instantiate all scopes. - for idx in 0..mir.source_scopes.len() { - let scope = SourceScope::new(idx); - make_mir_scope(cx, instance, mir, &variables, debug_context, &mut instantiated, scope); - } - assert!(instantiated.count() == mir.source_scopes.len()); -} - -/// Update the `debug_context`, adding new scope to it, -/// if it's not added as is denoted in `instantiated`. -/// -/// # Source of Origin -/// Copied from `create_scope_map.rs` of rustc_codegen_llvm -/// FIXME(tempdragon/?): Add Scope Support Here. -fn make_mir_scope<'gcc, 'tcx>( - cx: &CodegenCx<'gcc, 'tcx>, - _instance: Instance<'tcx>, - mir: &Body<'tcx>, - variables: &Option>, - debug_context: &mut FunctionDebugContext<'tcx, (), Location<'gcc>>, - instantiated: &mut DenseBitSet, - scope: SourceScope, -) { - if instantiated.contains(scope) { - return; - } - - let scope_data = &mir.source_scopes[scope]; - let parent_scope = if let Some(parent) = scope_data.parent_scope { - make_mir_scope(cx, _instance, mir, variables, debug_context, instantiated, parent); - debug_context.scopes[parent] - } else { - // The root is the function itself. - let file = cx.sess().source_map().lookup_source_file(mir.span.lo()); - debug_context.scopes[scope] = DebugScope { - file_start_pos: file.start_pos, - file_end_pos: file.end_position(), - ..debug_context.scopes[scope] - }; - instantiated.insert(scope); - return; - }; - - if let Some(ref vars) = *variables - && !vars.contains(scope) - && scope_data.inlined.is_none() - { - // Do not create a DIScope if there are no variables defined in this - // MIR `SourceScope`, and it's not `inlined`, to avoid debuginfo bloat. - debug_context.scopes[scope] = parent_scope; - instantiated.insert(scope); - return; - } - - let loc = cx.lookup_debug_loc(scope_data.span.lo()); - - // FIXME(tempdragon): Add the scope related code here if the scope is supported. - let dbg_scope = (); - - let inlined_at = scope_data.inlined.map(|(_, callsite_span)| { - // FIXME(eddyb) this doesn't account for the macro-related - // `Span` fixups that `rustc_codegen_ssa::mir::debuginfo` does. - - // FIXME(tempdragon): Add scope support and then revert to cg_llvm version of this closure - // NOTE: These variables passed () here. - // Changed to comply to clippy. - - /* let callsite_scope = */ - parent_scope.adjust_dbg_scope_for_span(cx, callsite_span); - cx.dbg_loc(/* callsite_scope */ (), parent_scope.inlined_at, callsite_span) - }); - let p_inlined_at = parent_scope.inlined_at; - // FIXME(tempdragon): dbg_scope: Add support for scope extension here. - inlined_at.or(p_inlined_at); - - debug_context.scopes[scope] = DebugScope { - dbg_scope, - inlined_at, - file_start_pos: loc.file.start_pos, - file_end_pos: loc.file.end_position(), - }; - instantiated.insert(scope); -} - /// A source code location used to generate debug information. // FIXME(eddyb) rename this to better indicate it's a duplicate of // `rustc_span::Loc` rather than `DILocation`, perhaps by making @@ -228,33 +115,19 @@ impl<'gcc, 'tcx> DebugInfoCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> { // FIXME(antoyo) } - fn create_function_debug_context( + fn dbg_create_lexical_block( &self, - instance: Instance<'tcx>, - fn_abi: &FnAbi<'tcx, Ty<'tcx>>, - llfn: Function<'gcc>, - mir: &mir::Body<'tcx>, - ) -> Option> { - if self.sess().opts.debuginfo == DebugInfo::None { - return None; - } - - // Initialize fn debug context (including scopes). - let empty_scope = DebugScope { - dbg_scope: self.dbg_scope_fn(instance, fn_abi, Some(llfn)), - inlined_at: None, - file_start_pos: BytePos(0), - file_end_pos: BytePos(0), - }; - let mut fn_debug_context = FunctionDebugContext { - scopes: IndexVec::from_elem(empty_scope, mir.source_scopes.as_slice()), - inlined_function_scopes: Default::default(), - }; - - // Fill in all the scopes, with the information from the MIR body. - compute_mir_scopes(self, instance, mir, &mut fn_debug_context); + _pos: BytePos, + _parent_scope: Self::DIScope, + ) -> Self::DIScope { + } - Some(fn_debug_context) + fn dbg_location_clone_with_discriminator( + &self, + loc: Self::DILocation, + _discriminator: u32, + ) -> Option { + Some(loc) } fn extend_scope_to_file( diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs index b19f63dd077..e28b15c708d 100644 --- a/src/intrinsic/llvm.rs +++ b/src/intrinsic/llvm.rs @@ -1662,37 +1662,62 @@ pub fn intrinsic<'gcc, 'tcx>(name: &str, cx: &CodegenCx<'gcc, 'tcx>) -> Function "llvm.x86.ldtilecfg" => "__builtin_trap", "llvm.x86.sttilecfg" => "__builtin_trap", "llvm.x86.tileloadd64" => "__builtin_trap", + "llvm.x86.tileloadd64.internal" => "__builtin_trap", "llvm.x86.tilerelease" => "__builtin_trap", "llvm.x86.tilestored64" => "__builtin_trap", + "llvm.x86.tilestored64.internal" => "__builtin_trap", "llvm.x86.tileloaddrs64" => "__builtin_trap", + "llvm.x86.tileloaddrs64.internal" => "__builtin_trap", "llvm.x86.tileloaddt164" => "__builtin_trap", + "llvm.x86.tileloaddt164.internal" => "__builtin_trap", "llvm.x86.tileloaddrst164" => "__builtin_trap", + "llvm.x86.tileloaddrst164.internal" => "__builtin_trap", "llvm.x86.tilezero" => "__builtin_trap", + "llvm.x86.tilezero.internal" => "__builtin_trap", "llvm.x86.tilemovrow" => "__builtin_trap", + "llvm.x86.tilemovrow.internal" => "__builtin_trap", "llvm.x86.tilemovrowi" => "__builtin_trap", "llvm.x86.tdpbhf8ps" => "__builtin_trap", + "llvm.x86.tdpbhf8ps.internal" => "__builtin_trap", "llvm.x86.tdphbf8ps" => "__builtin_trap", + "llvm.x86.tdphbf8ps.internal" => "__builtin_trap", "llvm.x86.tdpbf8ps" => "__builtin_trap", + "llvm.x86.tdpbf8ps.internal" => "__builtin_trap", "llvm.x86.tdphf8ps" => "__builtin_trap", + "llvm.x86.tdphf8ps.internal" => "__builtin_trap", "llvm.x86.tdpbf16ps" => "__builtin_trap", + "llvm.x86.tdpbf16ps.internal" => "__builtin_trap", "llvm.x86.tdpbssd" => "__builtin_trap", + "llvm.x86.tdpbssd.internal" => "__builtin_trap", "llvm.x86.tdpbsud" => "__builtin_trap", + "llvm.x86.tdpbsud.internal" => "__builtin_trap", "llvm.x86.tdpbusd" => "__builtin_trap", + "llvm.x86.tdpbusd.internal" => "__builtin_trap", "llvm.x86.tdpbuud" => "__builtin_trap", + "llvm.x86.tdpbuud.internal" => "__builtin_trap", "llvm.x86.tdpfp16ps" => "__builtin_trap", + "llvm.x86.tdpfp16ps.internal" => "__builtin_trap", "llvm.x86.tmmultf32ps" => "__builtin_trap", + "llvm.x86.tmmultf32ps.internal" => "__builtin_trap", "llvm.x86.tcvtrowps2phh" => "__builtin_trap", + "llvm.x86.tcvtrowps2phh.internal" => "__builtin_trap", "llvm.x86.tcvtrowps2phl" => "__builtin_trap", + "llvm.x86.tcvtrowps2phl.internal" => "__builtin_trap", "llvm.x86.tcvtrowd2ps" => "__builtin_trap", + "llvm.x86.tcvtrowd2ps.internal" => "__builtin_trap", "llvm.x86.tcvtrowd2psi" => "__builtin_trap", "llvm.x86.tcvtrowps2phhi" => "__builtin_trap", "llvm.x86.tcvtrowps2phli" => "__builtin_trap", "llvm.x86.tcvtrowps2bf16h" => "__builtin_trap", + "llvm.x86.tcvtrowps2bf16h.internal" => "__builtin_trap", "llvm.x86.tcvtrowps2bf16hi" => "__builtin_trap", "llvm.x86.tcvtrowps2bf16l" => "__builtin_trap", + "llvm.x86.tcvtrowps2bf16l.internal" => "__builtin_trap", "llvm.x86.tcvtrowps2bf16li" => "__builtin_trap", "llvm.x86.tcmmimfp16ps" => "__builtin_trap", + "llvm.x86.tcmmimfp16ps.internal" => "__builtin_trap", "llvm.x86.tcmmrlfp16ps" => "__builtin_trap", + "llvm.x86.tcmmrlfp16ps.internal" => "__builtin_trap", // NOTE: this file is generated by https://github.com/GuillaumeGomez/llvmint/blob/master/generate_list.py _ => map_arch_intrinsic(name), diff --git a/src/intrinsic/mod.rs b/src/intrinsic/mod.rs index b85eb752991..39f825e66f6 100644 --- a/src/intrinsic/mod.rs +++ b/src/intrinsic/mod.rs @@ -5,7 +5,7 @@ mod simd; use std::iter; use gccjit::{ComparisonOp, Function, FunctionType, RValue, ToRValue, Type, UnaryOp}; -use rustc_abi::{BackendRepr, HasDataLayout, WrappingRange}; +use rustc_abi::{Align, BackendRepr, HasDataLayout, WrappingRange}; use rustc_codegen_ssa::base::wants_msvc_seh; use rustc_codegen_ssa::common::IntPredicate; use rustc_codegen_ssa::errors::InvalidMonomorphization; @@ -367,8 +367,9 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc sym::volatile_load | sym::unaligned_volatile_load => { let ptr = args[0].immediate(); - let load = self.volatile_load(result.layout.gcc_type(self), ptr); - // FIXME(antoyo): set alignment. + let abi_align = result_layout.align.abi; + let ptr_align = if name == sym::volatile_load { abi_align } else { Align::ONE }; + let load = self.volatile_load(result.layout.gcc_type(self), ptr, ptr_align); if let BackendRepr::Scalar(scalar) = result.layout.backend_repr { self.to_immediate_scalar(load, scalar) } else { @@ -704,10 +705,6 @@ impl<'a, 'gcc, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'a, 'gcc, 'tc unimplemented!(); } - fn va_end(&mut self, _va_list: RValue<'gcc>) { - // FIXME(antoyo): implement. - } - fn retag_reg(&mut self, _ptr: Self::Value, _info: &RetagInfo) -> Self::Value { unimplemented!() } @@ -1363,7 +1360,7 @@ fn try_intrinsic<'a, 'b, 'gcc, 'tcx>( bx.call(fn_type, None, None, try_func, &[data], None, None); // Return 0 unconditionally from the intrinsic call; // we can never unwind. - OperandValue::Immediate(bx.const_i32(0)).store(bx, dest); + OperandValue::Immediate(bx.const_bool(false)).store(bx, dest); } else { if wants_msvc_seh(bx.sess()) { unimplemented!(); @@ -1420,7 +1417,7 @@ fn codegen_gnu_try<'gcc, 'tcx>( let current_block = bx.block; bx.switch_to_block(then); - bx.ret(bx.const_i32(0)); + bx.ret(bx.const_bool(false)); // Type indicator for the exception being thrown. // @@ -1434,7 +1431,7 @@ fn codegen_gnu_try<'gcc, 'tcx>( let ptr = bx.cx.context.new_call(None, eh_pointer_builtin, &[zero]); let catch_ty = bx.type_func(&[bx.type_i8p(), bx.type_i8p()], bx.type_void()); bx.call(catch_ty, None, None, catch_func, &[data, ptr], None, None); - bx.ret(bx.const_i32(1)); + bx.ret(bx.const_bool(true)); // NOTE: the blocks must be filled before adding the try/catch, otherwise gcc will not // generate a try/catch. @@ -1467,7 +1464,7 @@ fn get_rust_try_fn<'a, 'gcc, 'tcx>( // Define the type up front for the signature of the rust_try function. let tcx = cx.tcx; let i8p = Ty::new_mut_ptr(tcx, tcx.types.i8); - // `unsafe fn(*mut i8) -> ()` + // `unsafe fn(*mut Data) -> ()` let try_fn_ty = Ty::new_fn_ptr( tcx, ty::Binder::dummy(tcx.mk_fn_sig_rust_abi( @@ -1476,7 +1473,7 @@ fn get_rust_try_fn<'a, 'gcc, 'tcx>( rustc_hir::Safety::Unsafe, )), ); - // `unsafe fn(*mut i8, *mut i8) -> ()` + // `unsafe fn(*mut Data, *mut i8) -> ()` let catch_fn_ty = Ty::new_fn_ptr( tcx, ty::Binder::dummy(tcx.mk_fn_sig_rust_abi( @@ -1485,10 +1482,10 @@ fn get_rust_try_fn<'a, 'gcc, 'tcx>( rustc_hir::Safety::Unsafe, )), ); - // `unsafe fn(unsafe fn(*mut i8) -> (), *mut i8, unsafe fn(*mut i8, *mut i8) -> ()) -> i32` + // `unsafe fn(unsafe fn(*mut Data) -> (), *mut Data, unsafe fn(*mut Data, *mut i8) -> ()) -> bool` let rust_fn_sig = ty::Binder::dummy(cx.tcx.mk_fn_sig_rust_abi( [try_fn_ty, i8p, catch_fn_ty], - tcx.types.i32, + tcx.types.bool, rustc_hir::Safety::Unsafe, )); let rust_try = gen_fn(cx, "__rust_try", rust_fn_sig, codegen); diff --git a/src/lib.rs b/src/lib.rs index 13a78065338..9a75aef25bc 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -30,7 +30,6 @@ extern crate rustc_data_structures; extern crate rustc_errors; extern crate rustc_fs_util; extern crate rustc_hir; -extern crate rustc_index; #[cfg(feature = "master")] extern crate rustc_interface; extern crate rustc_log; @@ -89,11 +88,10 @@ use rustc_codegen_ssa::base::codegen_crate; use rustc_codegen_ssa::target_features::cfg_target_feature; use rustc_codegen_ssa::traits::{CodegenBackend, ExtraBackendMethods, WriteBackendMethods}; use rustc_codegen_ssa::{CompiledModule, CompiledModules, CrateInfo, ModuleCodegen, TargetConfig}; -use rustc_data_structures::fx::FxIndexMap; use rustc_data_structures::profiling::SelfProfilerRef; use rustc_data_structures::sync::IntoDynSyncSend; use rustc_errors::{DiagCtxt, DiagCtxtHandle}; -use rustc_middle::dep_graph::{WorkProduct, WorkProductId}; +use rustc_middle::dep_graph::{WorkProduct, WorkProductMap}; use rustc_middle::ty::TyCtxt; use rustc_middle::util::Providers; use rustc_session::Session; @@ -301,7 +299,7 @@ impl CodegenBackend for GccCodegenBackend { sess: &Session, _outputs: &OutputFilenames, crate_info: &CrateInfo, - ) -> (CompiledModules, FxIndexMap) { + ) -> (CompiledModules, WorkProductMap) { ongoing_codegen .downcast::>() .expect("Expected GccCodegenBackend's OngoingCodegen, found Box") @@ -318,9 +316,7 @@ impl CodegenBackend for GccCodegenBackend { } impl ExtraBackendMethods for GccCodegenBackend { - fn supports_parallel(&self) -> bool { - false - } + type Module = GccContext; fn codegen_allocator( &self, @@ -403,6 +399,10 @@ impl WriteBackendMethods for GccCodegenBackend { type ModuleBuffer = ModuleBuffer; type ThinData = (); + fn supports_parallel(&self) -> bool { + false + } + fn target_machine_factory( &self, _sess: &Session, diff --git a/src/type_.rs b/src/type_.rs index 5252f93a92e..514bcbe3bff 100644 --- a/src/type_.rs +++ b/src/type_.rs @@ -153,7 +153,7 @@ impl<'gcc, 'tcx> BaseTypeCodegenMethods for CodegenCx<'gcc, 'tcx> { if self.supports_f16_type { return self.context.new_c_type(CType::Float16); } - bug!("unsupported float width 16") + self.u16_type } fn type_f32(&self) -> Type<'gcc> { diff --git a/tests/failing-ui-tests.txt b/tests/failing-ui-tests.txt index e8a26a90890..da6544bb76d 100644 --- a/tests/failing-ui-tests.txt +++ b/tests/failing-ui-tests.txt @@ -110,4 +110,8 @@ tests/ui/eii/static/cross_crate_decl.rs tests/ui/eii/static/cross_crate_def.rs tests/ui/eii/static/same_address.rs tests/ui/eii/static/simple.rs +tests/ui/eii/static/default.rs +tests/ui/eii/static/default_cross_crate.rs +tests/ui/eii/static/default_explicit.rs +tests/ui/eii/static/default_cross_crate_explicit.rs tests/ui/explicit-tail-calls/default-trait-method.rs diff --git a/tools/cspell_dicts/rustc_codegen_gcc.txt b/tools/cspell_dicts/rustc_codegen_gcc.txt index 619221d5260..794ebec11c3 100644 --- a/tools/cspell_dicts/rustc_codegen_gcc.txt +++ b/tools/cspell_dicts/rustc_codegen_gcc.txt @@ -65,6 +65,7 @@ riscv rlib roundevenf rustc +sgpr sitofp sizet spir @@ -75,5 +76,7 @@ uitofp unord uninlined utrunc +vgpr xabort +xtensa zext