From 77076e52f243b2e135e8ee4c9372b68a8d49912e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E5=88=98=E9=9B=AA=E5=B3=B0?= Date: Mon, 6 Jul 2026 15:13:27 +0800 Subject: [PATCH] Fix the macro definitions related to CPU and FMC reset. --- drivers/watchdog/aspeed_wdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c index dd379372b8d615..d358de88023d69 100644 --- a/drivers/watchdog/aspeed_wdt.c +++ b/drivers/watchdog/aspeed_wdt.c @@ -120,7 +120,7 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table); #define WDT_CTRL_BOOT_SECONDARY BIT(7) #define WDT_CTRL_RESET_MODE_SOC (0x00 << 5) #define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5) -#define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5) +#define WDT_CTRL_RESET_MODE_ARM_CPU (0x02 << 5) #define WDT_CTRL_RST_SOC BIT(4) #define WDT_CTRL_1MHZ_CLK BIT(4) /* AST2400 only */ #define WDT_CTRL_WDT_EXT BIT(3)